2-output spin wave programmable logic gate

Abdulqader Mahmoud, Frederic Vanderveken, Christoph Adelmann, Florin Ciubotaru, Sorin Cotofana, Said Hamdioui

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This paper presents a 2-output Spin-Wave Programmable Logic Gate structure able to simultaneously evaluate any pair of AND, NAND, OR, NOR, XOR, and XNOR Boolean functions. Our proposal provides the means for fanout achievement within the Spin Wave computation domain and energy and area savings as two different functions can be simultaneously evaluated on the same input data. We validate our proposal by means of Object Oriented Micromagnetic Framework (OOMMF) simulations and demonstrate that by phase and magnetization threshold output sensing {AND, OR, NAND, NOR} and {XOR and XNOR} functionalities can be achieved, respectively. To get inside into the potential practical implications of our approach we use the proposed gate to implement a 3-input Majority gate, which we evaluate and compare with state of the art equivalent implementations in terms of area, delay, and energy consumptions. Our estimations indicate that the proposed gate provides 33% and 16% energy and area reduction, respectively, when compared with spin-wave counterpart and 42% energy reduction while consuming 12x less area when compared to a 15 nm CMOS implementation.

Original languageEnglish
Title of host publication2020 IEEE Computer Society Annual Symposium on VLSI (ISVLSI)
Subtitle of host publicationProceedings
EditorsL. O'Conner
Place of PublicationPiscataway
Number of pages6
ISBN (Electronic)978-1-7281-5775-7
ISBN (Print)978-1-7281-5776-4
Publication statusPublished - 2020
Event19th IEEE Computer Society Annual Symposium on VLSI, ISVLSI 2020 - Limassol, Cyprus
Duration: 6 Jul 20208 Jul 2020


Conference19th IEEE Computer Society Annual Symposium on VLSI, ISVLSI 2020


  • Energy Efficiency
  • Fan-out
  • Programmable Logic
  • Spin-wave
  • Spin-wave Computation Paradigm

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    Mahmoud, A., Vanderveken, F., Adelmann, C., Ciubotaru, F., Cotofana, S., & Hamdioui, S. (2020). 2-output spin wave programmable logic gate. In L. O'Conner (Ed.), 2020 IEEE Computer Society Annual Symposium on VLSI (ISVLSI): Proceedings (pp. 60-65). [9155012] IEEE. https://doi.org/10.1109/ISVLSI49217.2020.00021