3D-COSTAR: a cost model for 3D stacked ICs

M Taouil, S Hamdioui, EJ Marinissen, S Bhawmik

Research output: Chapter in Book/Conference proceedings/Edited volumeConference contributionScientificpeer-review

Original languageEnglish
Title of host publicationProceedings Third IEEE International Workshop on Testing Three-Dimensional Stacked Integrated Circuits
EditorsY Zorian, E Marijnissen, S Hamdioui
Place of PublicationLos Alamitos, CA, USA
PublisherIEEE
Pages1-6
Number of pages6
Publication statusPublished - 2012
Event3D-Test 2012, Anaheim, CA, USA - Los Alamitos, CA, USA
Duration: 8 Nov 20129 Nov 2012

Publication series

Name
PublisherIEEE Computer Society

Conference

Conference3D-Test 2012, Anaheim, CA, USA
Period8/11/129/11/12

Cite this

Taouil, M., Hamdioui, S., Marinissen, EJ., & Bhawmik, S. (2012). 3D-COSTAR: a cost model for 3D stacked ICs. In Y. Zorian, E. Marijnissen, & S. Hamdioui (Eds.), Proceedings Third IEEE International Workshop on Testing Three-Dimensional Stacked Integrated Circuits (pp. 1-6). IEEE.