TY - GEN
T1 - 6.2 A 4-Way Doherty Digital Transmitter Featuring 50%-LO Signed IQ Interleave Upconversion with more than 27dBm Peak Power and 40% Drain Efficiency at 10dB Power Back-Off Operating in the 5GHz Band
AU - Beikmirza, Mohammadreza
AU - Shen, Yiyu
AU - Mehrpoo, Mohammadreza
AU - Hashemi, Mohsen
AU - Mul, Dieuwert
AU - De Vreede, Leo C.N.
AU - Alavi, Morteza S.
PY - 2021
Y1 - 2021
N2 - Recently, digital transmitters (DTXs) that feature arrays of controlled digital PA (DPA) cells have become increasingly popular since they directly benefit from nanoscale CMOS technology, yielding reduced die area and highly efficient operation [1] -[6]. For wideband applications, I/Q DTXs are considered superior over their polar counterparts due to their linear I/Q operation, which avoids bandwidth expansion. Nevertheless, I/Q DTXs can suffer from the interaction between their I and Q paths, especially at higher power levels, giving rise to an I/Q image and nonlinearity. To tackle this issue, an IQ interleaved upconverter has been introduced [1]. However, its 25%-LO requirement restricts the operational frequency to below 5GHz. The diamond-shaped mapping technique, presented in [2], uses 50% LOs and a different I and Q combining method but suffers from nonlinearity due to a clipping operation. Besides, the large peak-to-average power ratio (PAPR) in modern wireless standards requires the DTX to operate in deep power back-off (DPBO), degrading its average efficiency. To target applications requiring large modulation bandwidth, high spectral purity and average efficiency, we present a DTX with a signed IQ interleaved upconversion approach based on 50%-LO clock distribution, which enables close to perfect orthogonal I/Q summation. To enhance its average efficiency, a compact, 4-way Doherty DPA architecture is introduced.
AB - Recently, digital transmitters (DTXs) that feature arrays of controlled digital PA (DPA) cells have become increasingly popular since they directly benefit from nanoscale CMOS technology, yielding reduced die area and highly efficient operation [1] -[6]. For wideband applications, I/Q DTXs are considered superior over their polar counterparts due to their linear I/Q operation, which avoids bandwidth expansion. Nevertheless, I/Q DTXs can suffer from the interaction between their I and Q paths, especially at higher power levels, giving rise to an I/Q image and nonlinearity. To tackle this issue, an IQ interleaved upconverter has been introduced [1]. However, its 25%-LO requirement restricts the operational frequency to below 5GHz. The diamond-shaped mapping technique, presented in [2], uses 50% LOs and a different I and Q combining method but suffers from nonlinearity due to a clipping operation. Besides, the large peak-to-average power ratio (PAPR) in modern wireless standards requires the DTX to operate in deep power back-off (DPBO), degrading its average efficiency. To target applications requiring large modulation bandwidth, high spectral purity and average efficiency, we present a DTX with a signed IQ interleaved upconversion approach based on 50%-LO clock distribution, which enables close to perfect orthogonal I/Q summation. To enhance its average efficiency, a compact, 4-way Doherty DPA architecture is introduced.
UR - http://www.scopus.com/inward/record.url?scp=85102341203&partnerID=8YFLogxK
U2 - 10.1109/ISSCC42613.2021.9365831
DO - 10.1109/ISSCC42613.2021.9365831
M3 - Conference contribution
AN - SCOPUS:85102341203
T3 - Digest of Technical Papers - IEEE International Solid-State Circuits Conference
SP - 92
EP - 94
BT - 2021 IEEE International Solid-State Circuits Conference, ISSCC 2021 - Digest of Technical Papers
PB - IEEE
T2 - 2021 IEEE International Solid-State Circuits Conference, ISSCC 2021
Y2 - 13 February 2021 through 22 February 2021
ER -