A 0.27mm2 13.5dBm 2.4GHz all-digital polar transmitter using 34%-efficiency Class-D DPA in 40nm CMOS

JW Lai; CH Wang; K Kao; A Lin; YH Cho; L Cho; MH Hung; XY Shih; CM Lin; SH Yan; YH Chung; PCP Liang; GK Dehng; HS Li; G Chien; RB Staszewski

doi:10.1109/ISSCC.2013.6487762

A 0.27mm2 13.5dBm 2.4GHz all-digital polar transmitter using 34%-efficiency Class-D DPA in 40nm CMOS

JW Lai, CH Wang, K Kao, A Lin, YH Cho, L Cho, MH Hung, XY Shih, CM Lin, SH Yan, YH Chung, PCP Liang, GK Dehng, HS Li, G Chien, RB Staszewski

Electronics

Research output: Chapter in Book/Conference proceedings/Edited volume › Conference contribution › Scientific › peer-review

34 Citations (Scopus)

Original language	English
Title of host publication	Digest of technical papers - 2013 IEEE International Solid-State Circuits Conference (ISSCC 2013)
Editors	A Chandrakasan, B Nauta
Place of Publication	Piscataway, NJ
Publisher	IEEE
Pages	342-344
Number of pages	3
ISBN (Print)	978-1-4673-4515-6
DOIs	https://doi.org/10.1109/ISSCC.2013.6487762
Publication status	Published - 2013
Event	ISSCC 2013 - San Francisco, CA, United States Duration: 17 Feb 2013 → 21 Feb 2013

Publication series

Name
Publisher	IEEE

Conference

Conference	ISSCC 2013
Country/Territory	United States
City	San Francisco, CA
Period	17/02/13 → 21/02/13

Bibliographical note

Harvest

Access to Document

10.1109/ISSCC.2013.6487762

Cite this

Lai, JW., Wang, CH., Kao, K., Lin, A., Cho, YH., Cho, L., Hung, MH., Shih, XY., Lin, CM., Yan, SH., Chung, YH., Liang, PCP., Dehng, GK., Li, HS., Chien, G., & Staszewski, RB. (2013). A 0.27mm2 13.5dBm 2.4GHz all-digital polar transmitter using 34%-efficiency Class-D DPA in 40nm CMOS. In A. Chandrakasan, & B. Nauta (Eds.), Digest of technical papers - 2013 IEEE International Solid-State Circuits Conference (ISSCC 2013) (pp. 342-344). IEEE. https://doi.org/10.1109/ISSCC.2013.6487762

@inproceedings{69478b33857d498a862a72bacf847275,

title = "A 0.27mm2 13.5dBm 2.4GHz all-digital polar transmitter using 34%-efficiency Class-D DPA in 40nm CMOS",

author = "JW Lai and CH Wang and K Kao and A Lin and YH Cho and L Cho and MH Hung and XY Shih and CM Lin and SH Yan and YH Chung and PCP Liang and GK Dehng and HS Li and G Chien and RB Staszewski",

note = "Harvest; ISSCC 2013 ; Conference date: 17-02-2013 Through 21-02-2013",

year = "2013",

doi = "10.1109/ISSCC.2013.6487762",

language = "English",

isbn = "978-1-4673-4515-6",

publisher = "IEEE",

pages = "342--344",

editor = "A Chandrakasan and B Nauta",

booktitle = "Digest of technical papers - 2013 IEEE International Solid-State Circuits Conference (ISSCC 2013)",

address = "United States",

}

Lai, JW, Wang, CH, Kao, K, Lin, A, Cho, YH, Cho, L, Hung, MH, Shih, XY, Lin, CM, Yan, SH, Chung, YH, Liang, PCP, Dehng, GK, Li, HS, Chien, G & Staszewski, RB 2013, A 0.27mm2 13.5dBm 2.4GHz all-digital polar transmitter using 34%-efficiency Class-D DPA in 40nm CMOS. in A Chandrakasan & B Nauta (eds), Digest of technical papers - 2013 IEEE International Solid-State Circuits Conference (ISSCC 2013). IEEE, Piscataway, NJ, pp. 342-344, ISSCC 2013, San Francisco, CA, United States, 17/02/13. https://doi.org/10.1109/ISSCC.2013.6487762

A 0.27mm2 13.5dBm 2.4GHz all-digital polar transmitter using 34%-efficiency Class-D DPA in 40nm CMOS. / Lai, JW; Wang, CH; Kao, K et al.
Digest of technical papers - 2013 IEEE International Solid-State Circuits Conference (ISSCC 2013). ed. / A Chandrakasan; B Nauta. Piscataway, NJ: IEEE, 2013. p. 342-344.

Research output: Chapter in Book/Conference proceedings/Edited volume › Conference contribution › Scientific › peer-review

TY - GEN

T1 - A 0.27mm2 13.5dBm 2.4GHz all-digital polar transmitter using 34%-efficiency Class-D DPA in 40nm CMOS

AU - Lai, JW

AU - Wang, CH

AU - Kao, K

AU - Lin, A

AU - Cho, YH

AU - Cho, L

AU - Hung, MH

AU - Shih, XY

AU - Lin, CM

AU - Yan, SH

AU - Chung, YH

AU - Liang, PCP

AU - Dehng, GK

AU - Li, HS

AU - Chien, G

AU - Staszewski, RB

N1 - Harvest

PY - 2013

Y1 - 2013

U2 - 10.1109/ISSCC.2013.6487762

DO - 10.1109/ISSCC.2013.6487762

M3 - Conference contribution

SN - 978-1-4673-4515-6

SP - 342

EP - 344

BT - Digest of technical papers - 2013 IEEE International Solid-State Circuits Conference (ISSCC 2013)

A2 - Chandrakasan, A

A2 - Nauta, B

PB - IEEE

CY - Piscataway, NJ

T2 - ISSCC 2013

Y2 - 17 February 2013 through 21 February 2013

ER -