A 1-3 GHz I/Q Interleaved Direct-Digital RF Modulator As A Driver for A Common-Gate PA in 40 nm CMOS

Yiyu Shen; Rob Bootsman; Morteza S. Alavi; Leo C.N. De Vreede

doi:10.1109/RFIC49505.2020.9218324

A 1-3 GHz I/Q Interleaved Direct-Digital RF Modulator As A Driver for A Common-Gate PA in 40 nm CMOS

Yiyu Shen, Rob Bootsman, Morteza S. Alavi, Leo C.N. De Vreede

Electronics

Research output: Chapter in Book/Conference proceedings/Edited volume › Conference contribution › Scientific › peer-review

7 Citations (Scopus)

Abstract

We present a 1-3 GHz, 2×13-bit I/Q interleaved direct-digital RF modulator (DDRM) realized in 40 nm CMOS technology as a driver for an external common-gate (CG) power amplifier (PA). The proposed digital-intensive quadrature up-converter features a pair of novel current-steering mixing DACs with an additional leakage path to boost the efficiency of the external CG PA. The realized DDRM also employs IQ-interleaving, harmonic rejection, and dynamic biasing to improve its spectral purity, in-band linearity, and system efficiency. The proposed digital up-converter prototype provides standalone more than 19.6 dBm RF peak output power. Without using any digital pre-distortion, it achieves an ACLR of-44.5 dBc and an EVM of-35 dB, when applying an 80 MHz 256 QAM signal at 2.4 GHz.

Original language	English
Title of host publication	RFIC 2020 - 2020 IEEE Radio Frequency Integrated Circuits Symposium
Publisher	IEEE
Pages	287-290
Number of pages	4
ISBN (Electronic)	9781728168098
DOIs	https://doi.org/10.1109/RFIC49505.2020.9218324
Publication status	Published - 2020
Event	2020 IEEE Radio Frequency Integrated Circuits Symposium, RFIC 2020 - Virtual, Los Angeles, United States Duration: 4 Aug 2020 → 6 Aug 2020

Publication series

Name	Digest of Papers - IEEE Radio Frequency Integrated Circuits Symposium
Volume	2020-August
ISSN (Print)	1529-2517

Conference

Conference	2020 IEEE Radio Frequency Integrated Circuits Symposium, RFIC 2020
Country/Territory	United States
City	Virtual, Los Angeles
Period	4/08/20 → 6/08/20

Keywords

CG PA
DDRM
DPD-free
dynamic biasing
harmonic rejection
IQ-Interleaving
PA driver
RF-DAC

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10.1109/RFIC49505.2020.9218324

Cite this

Shen, Y., Bootsman, R., Alavi, M. S., & De Vreede, L. C. N. (2020). A 1-3 GHz I/Q Interleaved Direct-Digital RF Modulator As A Driver for A Common-Gate PA in 40 nm CMOS. In RFIC 2020 - 2020 IEEE Radio Frequency Integrated Circuits Symposium (pp. 287-290). Article 9218324 (Digest of Papers - IEEE Radio Frequency Integrated Circuits Symposium; Vol. 2020-August). IEEE. https://doi.org/10.1109/RFIC49505.2020.9218324

@inproceedings{a644049809f0492992c311aa032e1413,

title = "A 1-3 GHz I/Q Interleaved Direct-Digital RF Modulator As A Driver for A Common-Gate PA in 40 nm CMOS",

abstract = "We present a 1-3 GHz, 2×13-bit I/Q interleaved direct-digital RF modulator (DDRM) realized in 40 nm CMOS technology as a driver for an external common-gate (CG) power amplifier (PA). The proposed digital-intensive quadrature up-converter features a pair of novel current-steering mixing DACs with an additional leakage path to boost the efficiency of the external CG PA. The realized DDRM also employs IQ-interleaving, harmonic rejection, and dynamic biasing to improve its spectral purity, in-band linearity, and system efficiency. The proposed digital up-converter prototype provides standalone more than 19.6 dBm RF peak output power. Without using any digital pre-distortion, it achieves an ACLR of-44.5 dBc and an EVM of-35 dB, when applying an 80 MHz 256 QAM signal at 2.4 GHz.",

keywords = "CG PA, DDRM, DPD-free, dynamic biasing, harmonic rejection, IQ-Interleaving, PA driver, RF-DAC",

author = "Yiyu Shen and Rob Bootsman and Alavi, {Morteza S.} and {De Vreede}, {Leo C.N.}",

year = "2020",

doi = "10.1109/RFIC49505.2020.9218324",

language = "English",

series = "Digest of Papers - IEEE Radio Frequency Integrated Circuits Symposium",

publisher = "IEEE",

pages = "287--290",

booktitle = "RFIC 2020 - 2020 IEEE Radio Frequency Integrated Circuits Symposium",

address = "United States",

note = "2020 IEEE Radio Frequency Integrated Circuits Symposium, RFIC 2020 ; Conference date: 04-08-2020 Through 06-08-2020",

}

Shen, Y , Bootsman, R , Alavi, MS & De Vreede, LCN 2020, A 1-3 GHz I/Q Interleaved Direct-Digital RF Modulator As A Driver for A Common-Gate PA in 40 nm CMOS. in RFIC 2020 - 2020 IEEE Radio Frequency Integrated Circuits Symposium., 9218324, Digest of Papers - IEEE Radio Frequency Integrated Circuits Symposium, vol. 2020-August, IEEE, pp. 287-290, 2020 IEEE Radio Frequency Integrated Circuits Symposium, RFIC 2020, Virtual, Los Angeles, United States, 4/08/20. https://doi.org/10.1109/RFIC49505.2020.9218324

A 1-3 GHz I/Q Interleaved Direct-Digital RF Modulator As A Driver for A Common-Gate PA in 40 nm CMOS. / Shen, Yiyu ; Bootsman, Rob ; Alavi, Morteza S. et al.
RFIC 2020 - 2020 IEEE Radio Frequency Integrated Circuits Symposium. IEEE, 2020. p. 287-290 9218324 (Digest of Papers - IEEE Radio Frequency Integrated Circuits Symposium; Vol. 2020-August).

Research output: Chapter in Book/Conference proceedings/Edited volume › Conference contribution › Scientific › peer-review

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AU - De Vreede, Leo C.N.

PY - 2020

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N2 - We present a 1-3 GHz, 2×13-bit I/Q interleaved direct-digital RF modulator (DDRM) realized in 40 nm CMOS technology as a driver for an external common-gate (CG) power amplifier (PA). The proposed digital-intensive quadrature up-converter features a pair of novel current-steering mixing DACs with an additional leakage path to boost the efficiency of the external CG PA. The realized DDRM also employs IQ-interleaving, harmonic rejection, and dynamic biasing to improve its spectral purity, in-band linearity, and system efficiency. The proposed digital up-converter prototype provides standalone more than 19.6 dBm RF peak output power. Without using any digital pre-distortion, it achieves an ACLR of-44.5 dBc and an EVM of-35 dB, when applying an 80 MHz 256 QAM signal at 2.4 GHz.

AB - We present a 1-3 GHz, 2×13-bit I/Q interleaved direct-digital RF modulator (DDRM) realized in 40 nm CMOS technology as a driver for an external common-gate (CG) power amplifier (PA). The proposed digital-intensive quadrature up-converter features a pair of novel current-steering mixing DACs with an additional leakage path to boost the efficiency of the external CG PA. The realized DDRM also employs IQ-interleaving, harmonic rejection, and dynamic biasing to improve its spectral purity, in-band linearity, and system efficiency. The proposed digital up-converter prototype provides standalone more than 19.6 dBm RF peak output power. Without using any digital pre-distortion, it achieves an ACLR of-44.5 dBc and an EVM of-35 dB, when applying an 80 MHz 256 QAM signal at 2.4 GHz.

KW - CG PA

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KW - harmonic rejection

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PB - IEEE

T2 - 2020 IEEE Radio Frequency Integrated Circuits Symposium, RFIC 2020

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ER -

A 1-3 GHz I/Q Interleaved Direct-Digital RF Modulator As A Driver for A Common-Gate PA in 40 nm CMOS

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