A 10 fJ·K 2Wheatstone Bridge Temperature Sensor with a Tail-Resistor-Linearized OTA

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Abstract

This article describes a highly energy-efficient Wheatstone bridge temperature sensor. To maximize sensitivity, the bridge is made from resistors with positive (silicided diffusion) and negative (poly) temperature coefficients. The bridge is balanced by a resistive (poly) FIR-DAC, which is part of a 2nd-order continuous-time delta-sigma modulator (CT Δ Σ M). Each stage of the modulator is based on an energy-efficient current-reuse OTA. To efficiently suppress quantization noise foldback, the 1st stage OTA employs a tail-resistor linearization scheme. Sensor accuracy is enhanced by realizing the poly arms of the bridge and the DAC from identical unit elements. Fabricated in a 180-nm CMOS technology, the sensor draws 55 μ W from a 1.8-V supply and achieves a resolution of 150 μ K rms in an 8-ms conversion time. This translates into a state-of-the-art resolution figure-of-merit (FoM) of 10 fJ · K2. Furthermore, the sensor achieves an inaccuracy of ±0.4 °C (3 σ) from -55 °C to 125 °C after a ratio-based one-point trim and systematic non-linearity removal, which improves to ±0.1 °C (3 σ) after a 1st-order fit.

Original languageEnglish
Article number9186289
Pages (from-to)501-510
Number of pages10
JournalIEEE Journal of Solid-State Circuits
Volume56
Issue number2
DOIs
Publication statusPublished - 2020

Keywords

  • Continuous-time delta-sigma modulator (CTΔΣM)
  • energy efficiency
  • linearization
  • smart sensor
  • temperature sensor
  • trimming

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