A 10kHz-BW 93.7dB-SNR Chopped ΔΣ ADC with 30V Input CM Range and 115dB CMRR at 10kHz

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Abstract

This paper presents a 15-bit ΔΣ ADC with 10kHz-BW which can handle 30V CM voltages with high AC CMRR (in excess of 115dB at 10kHz) while operating from a 1.8 V supply. An HV capacitively-coupled chopper at its input enables the accurate sampling of input signals beyond the supply rails. Chopping is used to mitigate the ADC's offset and to enhance its CMRR, especially at high frequencies.
Original languageEnglish
Title of host publication2017 IEEE Asian Solid-State Circuits Conference (A-SSCC)
Subtitle of host publicationProceedings of Technical Papers
Place of PublicationDanvers, MA
PublisherIEEE
Pages49-52
Number of pages4
ISBN (Electronic)978-1-5386-3178-2
DOIs
Publication statusPublished - 2017
EventA-SSCC 2017: 13th annual IEEE Asian Solid-State Circuits Conference - Grand Hilton Hotel, Seoul, Korea, Republic of
Duration: 6 Nov 20178 Nov 2017
Conference number: 13
http://www.asscc.org/

Conference

ConferenceA-SSCC 2017
CountryKorea, Republic of
CitySeoul
Period6/11/178/11/17
Internet address

Keywords

  • beyond-the-rails
  • chopping
  • CMRR
  • ΔΣ ADC

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    Xu, L., Huijsing, J. H., & Makinwa, K. A. A. (2017). A 10kHz-BW 93.7dB-SNR Chopped ΔΣ ADC with 30V Input CM Range and 115dB CMRR at 10kHz. In 2017 IEEE Asian Solid-State Circuits Conference (A-SSCC): Proceedings of Technical Papers (pp. 49-52). IEEE. https://doi.org/10.1109/ASSCC.2017.8240213