Class-D amplifiers (CDAs) are often used in audio applications due to their superior power efficiency. Due to the sensitivity of the human ear, a large dynamic range (DR) is desired, and audio DACs with up to 130dB DR are commercially available . However, the DR of the CDAs they drive is typically much lower -, mainly due to the thermal noise introduced by the input resistors of their resistive feedback networks. Reducing this resistance is difficult, as it reduces the CDA's input impedance and increases the required loop-filter capacitance. Alternatively, the CDA could be configured as a capacitively coupled chopper amplifier (CCCA), whose capacitive feedback network could then achieve low noise without reducing input impedance. However, the large PWM component present at its output would then saturate its input stage. By exploiting the inherent PWM filtering present in a feedback-after-LC architecture, this paper presents a capacitively coupled chopper CDA, resulting in significantly improved DR and THD+N. The prototype achieves 8V_RMS of integrated output noise (A-weighted), a 121.4dB DR, and -1 09.8dB THD+N while delivering a maximum of 15/26W into an 8/4Omega load with 93%/88% efficiency.
|Title of host publication||2022 IEEE International Solid- State Circuits Conference (ISSCC)|
|Subtitle of host publication||Digest of technical papers|
|Editors||Laura C. Fujino|
|Place of Publication||Danvers|
|Number of pages||3|
|Publication status||Published - 2022|
|Event||2022 IEEE International Solid- State Circuits Conference (ISSCC) - Online at San Francisco, United States|
Duration: 20 Feb 2022 → 26 Feb 2022
|Name||Digest of Technical Papers - IEEE International Solid-State Circuits Conference|
|Conference||2022 IEEE International Solid- State Circuits Conference (ISSCC)|
|Abbreviated title||ISSCC 2022|
|City||Online at San Francisco|
|Period||20/02/22 → 26/02/22|
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