A 1.22ps Integrated-Jitter 0.25-to-4GHz Fractional-N ADPLL in 16nm FinFET CMOS

TH Tsai, MS Yuan, CH Chang, CC Liao, CC Li, RB Staszewski

Research output: Chapter in Book/Conference proceedings/Edited volumeConference contributionScientificpeer-review

37 Citations (Scopus)
Original languageEnglish
Title of host publicationDigest of technical papers - 2015 IEEE International Solid-State Circuits Conference
EditorsM Romdhane
Place of PublicationPiscataway, NJ, USA
PublisherIEEE Society
Pages259-261
Number of pages3
ISBN (Print)978-1-4799-6223-5
DOIs
Publication statusPublished - 2015
EventIEEE ISSCC 2015, San Francisco, CA, USA - Piscataway, NJ, USA
Duration: 22 Feb 201526 Feb 2015

Publication series

Name
PublisherIEEE

Conference

ConferenceIEEE ISSCC 2015, San Francisco, CA, USA
Period22/02/1526/02/15

Bibliographical note

Harvest
Session 14.5

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