A 280 μW Dynamic Zoom ADC With 120 dB DR 118 dB SNDR in 1 kHz BW

Shoubhik Karmakar; Burak Gönen; Fabio Sebastiano; Robert van Veldhoven; Kofi A.A. Makinwa

doi:10.1109/JSSC.2018.2865466

A 280 μW Dynamic Zoom ADC With 120 dB DR 118 dB SNDR in 1 kHz BW

Shoubhik Karmakar, Burak Gönen, Fabio Sebastiano, Robert van Veldhoven, Kofi A.A. Makinwa

Research output: Contribution to journal › Article › Scientific › peer-review

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Abstract

This paper presents a dynamic zoom analog-to-digital converter for use in low-bandwidth (<1 kHz) instrumentation applications. It employs a high-speed asynchronous successive approximation register (SAR) ADC that dynamically updates the references of a fully differential Δ Σ ADC. Compared to previous zoom ADCs, faster reference updates relax the loop filter requirements, thus allowing the adoption of energy-efficient amplifiers. Fabricated in a 0.16-μm CMOS process, the prototype occupies 0.26 mm² and achieves 119.1-dB peak signal-to-noise ratio (SNR), 118.1-dB peak signal-to-noise-and-distortion-ratio (SNDR), and 120.3-dB dynamic range (DR) in a 1-kHz bandwidth while consuming 280 μW. This results in a Schreier figure of merit (FoM) of 185.8 dB.

Original language	English
Pages (from-to)	1-11
Number of pages	11
Journal	IEEE Journal of Solid-State Circuits
DOIs	https://doi.org/10.1109/JSSC.2018.2865466
Publication status	Published - 2018

Bibliographical note

Green Open Access added to TU Delft Institutional Repository ‘You share, we take care!’ – Taverne project https://www.openaccess.nl/en/you-share-we-take-care
Otherwise as indicated in the copyright section: the publisher is the copyright holder of this work and the author uses the Dutch legislation to make this work public.

Keywords

A/D conversion
asynchronous successive approximation register analog-to-digital converter
Bandwidth
battery-powered applications
Clocks
delta-sigma ADC
Distance measurement
dynamic zoom ADC
Energy resolution
inverter-based operational transconductance amplifier (OTA)
Linearity
low-power circuits.
Registers
Signal resolution

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10.1109/JSSC.2018.2865466

A_280__mu_W_Dynamic_Zoom_ADC_With_120_dB_DR_and_118_dB_SNDR_in_1_kHz_BWFinal published version, 4.14 MB

Cite this

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title = "A 280 μW Dynamic Zoom ADC With 120 dB DR 118 dB SNDR in 1 kHz BW",

abstract = "This paper presents a dynamic zoom analog-to-digital converter for use in low-bandwidth (<1 kHz) instrumentation applications. It employs a high-speed asynchronous successive approximation register (SAR) ADC that dynamically updates the references of a fully differential Δ Σ ADC. Compared to previous zoom ADCs, faster reference updates relax the loop filter requirements, thus allowing the adoption of energy-efficient amplifiers. Fabricated in a 0.16-μm CMOS process, the prototype occupies 0.26 mm² and achieves 119.1-dB peak signal-to-noise ratio (SNR), 118.1-dB peak signal-to-noise-and-distortion-ratio (SNDR), and 120.3-dB dynamic range (DR) in a 1-kHz bandwidth while consuming 280 μW. This results in a Schreier figure of merit (FoM) of 185.8 dB.",

keywords = "A/D conversion, asynchronous successive approximation register analog-to-digital converter, Bandwidth, battery-powered applications, Clocks, delta-sigma ADC, Distance measurement, dynamic zoom ADC, Energy resolution, inverter-based operational transconductance amplifier (OTA), Linearity, low-power circuits., Registers, Signal resolution",

author = "Shoubhik Karmakar and Burak G{\"o}nen and Fabio Sebastiano and {van Veldhoven}, Robert and Makinwa, {Kofi A.A.}",

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AU - van Veldhoven, Robert

AU - Makinwa, Kofi A.A.

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PY - 2018

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N2 - This paper presents a dynamic zoom analog-to-digital converter for use in low-bandwidth (<1 kHz) instrumentation applications. It employs a high-speed asynchronous successive approximation register (SAR) ADC that dynamically updates the references of a fully differential Δ Σ ADC. Compared to previous zoom ADCs, faster reference updates relax the loop filter requirements, thus allowing the adoption of energy-efficient amplifiers. Fabricated in a 0.16-μm CMOS process, the prototype occupies 0.26 mm² and achieves 119.1-dB peak signal-to-noise ratio (SNR), 118.1-dB peak signal-to-noise-and-distortion-ratio (SNDR), and 120.3-dB dynamic range (DR) in a 1-kHz bandwidth while consuming 280 μW. This results in a Schreier figure of merit (FoM) of 185.8 dB.

AB - This paper presents a dynamic zoom analog-to-digital converter for use in low-bandwidth (<1 kHz) instrumentation applications. It employs a high-speed asynchronous successive approximation register (SAR) ADC that dynamically updates the references of a fully differential Δ Σ ADC. Compared to previous zoom ADCs, faster reference updates relax the loop filter requirements, thus allowing the adoption of energy-efficient amplifiers. Fabricated in a 0.16-μm CMOS process, the prototype occupies 0.26 mm² and achieves 119.1-dB peak signal-to-noise ratio (SNR), 118.1-dB peak signal-to-noise-and-distortion-ratio (SNDR), and 120.3-dB dynamic range (DR) in a 1-kHz bandwidth while consuming 280 μW. This results in a Schreier figure of merit (FoM) of 185.8 dB.

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KW - Energy resolution

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A 280 μW Dynamic Zoom ADC With 120 dB DR 118 dB SNDR in 1 kHz BW

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Keywords

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