A 2pA/√Hz Transimpedance Amplifier for Miniature Ultrasound Probes with 36dB Continuous-Time Gain Compensation

Eunchul Kang, Mingliang Tan, Jae Sung An, Zu Yao Chang, Philippe Vince, Nicolas Senegond, Tony Mateo, Cyril Meynier, Michiel Pertijs

Research output: Chapter in Book/Conference proceedings/Edited volumeConference contributionScientificpeer-review

11 Citations (Scopus)


Miniature ultrasound probes, such as the intra-cardiac echography (ICE) probe shown in Fig. 23.6.1, increasingly employ in-probe ASICs to interface with the elements of an ultrasound transducer array to improve signal quality and reduce cable count [1]-[4]. For each transducer element, such an ASIC contains a pulser that drives the element to generate a pressure wave, a low-noise amplifier (LNA) that amplifies the resulting echo signal, and a time-gain compensation (TGC) circuit that compensates for the time-varying echo-signal amplitude due to propagation attenuation of the acoustic wave. Without TGC, the first echoes, from shallow tissue, are much larger than later echoes from deeper tissue. The TGC circuit corrects for this, ideally by providing a gain that increases exponentially with time, thus reducing the dynamic range (DR) by as much as 40dB and strongly relaxing the requirements of subsequent blocks. In conventional ultrasound systems, TGC is typically performed after the LNA, implying that a power-hungry LNA is required that can handle the full DR of the echo signal [5], [6]. In recent in-probe ASICs, programmable-gain LNAs have been employed that provide a step-wise TGC approximation [1]-[3]. While this saves power, the associated gain-switching transients lead to imaging artefacts. In this paper, we present an LNA with a built-in continuous TGC function that mitigates this problem. The LNA is a transimpedance amplifier (TIA) optimized to amplify the signal current of a capacitive micro-machined ultrasound transducer (CMUT). We demonstrate its integration into a 64-channel ASIC for a CMUT-based ICE probe.

Original languageEnglish
Title of host publication2020 IEEE International Solid-State Circuits Conference, ISSCC 2020
Number of pages3
ISBN (Electronic) 978-1-7281-3205-1
ISBN (Print)978-1-7281-3206-8
Publication statusPublished - 2020
Event2020 IEEE International Solid-State Circuits Conference, ISSCC 2020 - San Francisco, United States
Duration: 16 Feb 202020 Feb 2020


Conference2020 IEEE International Solid-State Circuits Conference, ISSCC 2020
Country/TerritoryUnited States
CitySan Francisco

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