A 3D network-on-chip for stacked-die transactional chip multiprocessors using through silicon vias

SS Kumar, TGRM van Leuken

Research output: Chapter in Book/Conference proceedings/Edited volumeConference contributionScientificpeer-review

8 Citations (Scopus)
Original languageEnglish
Title of host publication6th International Conference on Design & Technology of Integrated Systems in Nanoscale Era (DTIS)
EditorsI Voyiatzis, H-J Wunderlich
Place of PublicationPiscataway, NJ, USA
PublisherIEEE Society
Pages1-6
Number of pages6
ISBN (Print)978-1-61284-899-0
DOIs
Publication statusPublished - 2011
EventInternational Conference on Design & Technology of Integrated Systems in Nanoscale Era (DTIS) - Piscataway, NJ, USA
Duration: 6 Apr 20118 Apr 2011

Publication series

Name
PublisherIEEE

Conference

ConferenceInternational Conference on Design & Technology of Integrated Systems in Nanoscale Era (DTIS)
Period6/04/118/04/11

Keywords

  • Conf.proc. > 3 pag

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