A 3V 15b 157W Cryo-CMOS DAC for Multiplexed Spin-Qubit Biasing

Luc Enthoven; Job Van Staveren; Jiang Gong; Masoud Babaie; Fabio Sebastiano

doi:10.1109/VLSITechnologyandCir46769.2022.9830309

A 3V 15b 157W Cryo-CMOS DAC for Multiplexed Spin-Qubit Biasing

Luc Enthoven^*, Job Van Staveren, Jiang Gong, Masoud Babaie, Fabio Sebastiano

^*Corresponding author for this work

Research output: Chapter in Book/Conference proceedings/Edited volume › Conference contribution › Scientific › peer-review

6 Citations (Scopus)

149 Downloads (Pure)

Abstract

This paper presents a 15b cryo-CMOS DAC for multiplexed spin-qubit biasing implemented in a 22-nm FinFET process. The integrating-DAC architecture and the robust digitally-assisted high-voltage output stage enable a low power dissipation (157W) and small area (0.08mm2) independent of the number of biased qubits, and a 3V output range well beyond the nominal supply. This represents the first scalable solution for cryo-CMOS qubit biasing, which achieves a 1.8× better voltage resolution with a lower DNL over a 3× larger output range than the current state-of-the-art.

Original language	English
Title of host publication	2022 IEEE Symposium on VLSI Technology and Circuits, VLSI Technology and Circuits 2022
Place of Publication	Piscataway, NJ, USA
Publisher	IEEE
Pages	228-229
ISBN (Electronic)	978-1-6654-9772-5
DOIs	https://doi.org/10.1109/VLSITechnologyandCir46769.2022.9830309
Publication status	Published - 2022
Event	2022 IEEE Symposium on VLSI Technology and Circuits, VLSI Technology and Circuits 2022 - Honolulu, United States Duration: 12 Jun 2022 → 17 Jun 2022

Publication series

Name	Digest of Technical Papers - Symposium on VLSI Technology
Volume	2022-June
ISSN (Print)	0743-1562

Conference

Conference	2022 IEEE Symposium on VLSI Technology and Circuits, VLSI Technology and Circuits 2022
Country/Territory	United States
City	Honolulu
Period	12/06/22 → 17/06/22

Bibliographical note

Green Open Access added to TU Delft Institutional Repository 'You share, we take care!' - Taverne project https://www.openaccess.nl/en/you-share-we-take-care
Otherwise as indicated in the copyright section: the publisher is the copyright holder of this work and the author uses the Dutch legislation to make this work public.

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A_3V_15b_157W_Cryo_CMOS_DAC_for_Multiplexed_Spin_Qubit_BiasingFinal published version, 1.26 MB

Cite this

Enthoven, L., Van Staveren, J., Gong, J., Babaie, M., & Sebastiano, F. (2022). A 3V 15b 157W Cryo-CMOS DAC for Multiplexed Spin-Qubit Biasing. In 2022 IEEE Symposium on VLSI Technology and Circuits, VLSI Technology and Circuits 2022 (pp. 228-229). (Digest of Technical Papers - Symposium on VLSI Technology; Vol. 2022-June). IEEE. https://doi.org/10.1109/VLSITechnologyandCir46769.2022.9830309

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title = "A 3V 15b 157W Cryo-CMOS DAC for Multiplexed Spin-Qubit Biasing",

abstract = "This paper presents a 15b cryo-CMOS DAC for multiplexed spin-qubit biasing implemented in a 22-nm FinFET process. The integrating-DAC architecture and the robust digitally-assisted high-voltage output stage enable a low power dissipation (157W) and small area (0.08mm2) independent of the number of biased qubits, and a 3V output range well beyond the nominal supply. This represents the first scalable solution for cryo-CMOS qubit biasing, which achieves a 1.8× better voltage resolution with a lower DNL over a 3× larger output range than the current state-of-the-art. ",

author = "Luc Enthoven and {Van Staveren}, Job and Jiang Gong and Masoud Babaie and Fabio Sebastiano",

note = "Green Open Access added to TU Delft Institutional Repository 'You share, we take care!' - Taverne project https://www.openaccess.nl/en/you-share-we-take-care Otherwise as indicated in the copyright section: the publisher is the copyright holder of this work and the author uses the Dutch legislation to make this work public.; 2022 IEEE Symposium on VLSI Technology and Circuits, VLSI Technology and Circuits 2022 ; Conference date: 12-06-2022 Through 17-06-2022",

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doi = "10.1109/VLSITechnologyandCir46769.2022.9830309",

language = "English",

series = "Digest of Technical Papers - Symposium on VLSI Technology",

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address = "United States",

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Enthoven, L , Van Staveren, J, Gong, J, Babaie, M & Sebastiano, F 2022, A 3V 15b 157W Cryo-CMOS DAC for Multiplexed Spin-Qubit Biasing. in 2022 IEEE Symposium on VLSI Technology and Circuits, VLSI Technology and Circuits 2022. Digest of Technical Papers - Symposium on VLSI Technology, vol. 2022-June, IEEE, Piscataway, NJ, USA, pp. 228-229, 2022 IEEE Symposium on VLSI Technology and Circuits, VLSI Technology and Circuits 2022, Honolulu, United States, 12/06/22. https://doi.org/10.1109/VLSITechnologyandCir46769.2022.9830309

A 3V 15b 157W Cryo-CMOS DAC for Multiplexed Spin-Qubit Biasing. / Enthoven, Luc ; Van Staveren, Job; Gong, Jiang et al.
2022 IEEE Symposium on VLSI Technology and Circuits, VLSI Technology and Circuits 2022. Piscataway, NJ, USA: IEEE, 2022. p. 228-229 (Digest of Technical Papers - Symposium on VLSI Technology; Vol. 2022-June).

Research output: Chapter in Book/Conference proceedings/Edited volume › Conference contribution › Scientific › peer-review

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AU - Babaie, Masoud

AU - Sebastiano, Fabio

N1 - Green Open Access added to TU Delft Institutional Repository 'You share, we take care!' - Taverne project https://www.openaccess.nl/en/you-share-we-take-care Otherwise as indicated in the copyright section: the publisher is the copyright holder of this work and the author uses the Dutch legislation to make this work public.

PY - 2022

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N2 - This paper presents a 15b cryo-CMOS DAC for multiplexed spin-qubit biasing implemented in a 22-nm FinFET process. The integrating-DAC architecture and the robust digitally-assisted high-voltage output stage enable a low power dissipation (157W) and small area (0.08mm2) independent of the number of biased qubits, and a 3V output range well beyond the nominal supply. This represents the first scalable solution for cryo-CMOS qubit biasing, which achieves a 1.8× better voltage resolution with a lower DNL over a 3× larger output range than the current state-of-the-art.

AB - This paper presents a 15b cryo-CMOS DAC for multiplexed spin-qubit biasing implemented in a 22-nm FinFET process. The integrating-DAC architecture and the robust digitally-assisted high-voltage output stage enable a low power dissipation (157W) and small area (0.08mm2) independent of the number of biased qubits, and a 3V output range well beyond the nominal supply. This represents the first scalable solution for cryo-CMOS qubit biasing, which achieves a 1.8× better voltage resolution with a lower DNL over a 3× larger output range than the current state-of-the-art.

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Enthoven L , Van Staveren J, Gong J, Babaie M , Sebastiano F. A 3V 15b 157W Cryo-CMOS DAC for Multiplexed Spin-Qubit Biasing. In 2022 IEEE Symposium on VLSI Technology and Circuits, VLSI Technology and Circuits 2022. Piscataway, NJ, USA: IEEE. 2022. p. 228-229. (Digest of Technical Papers - Symposium on VLSI Technology). doi: 10.1109/VLSITechnologyandCir46769.2022.9830309

A 3V 15b 157W Cryo-CMOS DAC for Multiplexed Spin-Qubit Biasing

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