A 40-Gb/s 211-1 PRBS with Distributed Clocking and a Trigger Countdown Output

Leonardo Vera Villarroel; John Long

doi:10.1109/TCSII.2016.2531091

A 40-Gb/s 2¹¹-1 PRBS with Distributed Clocking and a Trigger Countdown Output

Leonardo Vera Villarroel, John Long

Electronics

Research output: Contribution to journal › Article › Scientific › peer-review

9 Citations (Scopus)

Abstract

A 2¹¹-1 pseudo-random binary sequence (PRBS) generator with trigger synchronization output (9.77-MHz rate) is implemented using synthetic transmission lines for the clock distribution. The full-rate data sequence is sourced from a 2:1 multiplex of dual shift register outputs synchronized to a half-rate clock. Quadrature half-rate clocks generated by a dual-mode (Dynastat) divide-by-2 are distributed via the synthetic lines to optimize power-speed tradeoffs in the design. The 790×620μm² PRBS designed in 130-nm SiGe BiCMOS (200/280 GHz f_T/fmax) consumes 250 mA at 2.5 V (i.e., 625 mW).

Original language	English
Article number	7410032
Pages (from-to)	758-762
Number of pages	5
Journal	IEEE Transactions on Circuits and Systems Part 2: Express Briefs
Volume	63
Issue number	8
DOIs	https://doi.org/10.1109/TCSII.2016.2531091
Publication status	Published - 1 Aug 2016

Keywords

Dynastat frequency divider
pseudo-random binary sequence (PRBS) generator
SiGe heterojunction bipolar transistor (HBT)
SiGe-BiCMOS technology
synthetic transmission line
trigger generator

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10.1109/TCSII.2016.2531091

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title = "A 40-Gb/s 211-1 PRBS with Distributed Clocking and a Trigger Countdown Output",

abstract = "A 211-1 pseudo-random binary sequence (PRBS) generator with trigger synchronization output (9.77-MHz rate) is implemented using synthetic transmission lines for the clock distribution. The full-rate data sequence is sourced from a 2:1 multiplex of dual shift register outputs synchronized to a half-rate clock. Quadrature half-rate clocks generated by a dual-mode (Dynastat) divide-by-2 are distributed via the synthetic lines to optimize power-speed tradeoffs in the design. The 790×620μm2 PRBS designed in 130-nm SiGe BiCMOS (200/280 GHz fT/fmax) consumes 250 mA at 2.5 V (i.e., 625 mW).",

keywords = "Dynastat frequency divider, pseudo-random binary sequence (PRBS) generator, SiGe heterojunction bipolar transistor (HBT), SiGe-BiCMOS technology, synthetic transmission line, trigger generator",

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A 40-Gb/s 2¹¹-1 PRBS with Distributed Clocking and a Trigger Countdown Output

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Keywords

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