A 440μW, 109.8dB DR, 106.5dB SNDR Discrete-Time Zoom ADC with a 20kHz BW

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Abstract

This paper presents a discrete-time (DT) zoom ADC for audio applications. A 2b quantizer in combination with a low power 'fuzz' suppression technique, results in a significant improvement in linearity and energy-efficiency over previous designs. The ADC occupies 0.27mm2 in 0.16μm CMOS and consumes 440μW from a 1.8V supply. In a 20kHz BW, it achieves 109.8dB DR and 106.5dB SNDR, resulting in a state-of-the-art Schreier FoM of 186.4dB.

Original languageEnglish
Title of host publication2020 IEEE Symposium on VLSI Circuits
Subtitle of host publicationProceedings
Place of PublicationPiscataway
PublisherIEEE
Pages1-2
Number of pages2
ISBN (Electronic)978-1-7281-9942-9
ISBN (Print)978-1-7281-9943-6
DOIs
Publication statusPublished - 2020
Event2020 IEEE Symposium on VLSI Circuits, VLSI Circuits 2020 - Honolulu, United States
Duration: 16 Jun 202019 Jun 2020

Conference

Conference2020 IEEE Symposium on VLSI Circuits, VLSI Circuits 2020
CountryUnited States
CityHonolulu
Period16/06/2019/06/20

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