TY - GEN
T1 - A 720 nW Current Sensor with 0-to-15 V Input Common-Mode Range and ±0.5% Gain Error from -40 to 85 °C
AU - Zamparette, Roger
AU - Makinwa, Kofi
N1 - Green Open Access added to TU Delft Institutional Repository ‘You share, we take care!’ – Taverne project https://www.openaccess.nl/en/you-share-we-take-care Otherwise as indicated in the copyright section: the publisher is the copyright holder of this work and the author uses the Dutch legislation to make this work public.
PY - 2023
Y1 - 2023
N2 - This paper presents a nano-power high-side shunt-based current sensor (CS) that digitizes the voltage drop across an on-chip (±1A) or a lead-frame (±30A) shunt. A TC-tunable ADC reference compensates for the shunts' large temperature coefficient (TC), resulting in ±0.5% gain error from -40 to 85°C. The CS employs a capacitively coupled gm-boosted front-end followed by a CCO-based Δ Σ ADC. Together with a floating input chopper, this results in an input common-mode range (ICMR) of 0-to-15V, the largest reported for a CS implemented in a standard CMOS process. It achieves high energy efficiency (164dB FoM) while consuming only 720nW, representing a 4 × improvement on the state-of-the-art and making this the first ever reported sub-μ W smart current sensor.
AB - This paper presents a nano-power high-side shunt-based current sensor (CS) that digitizes the voltage drop across an on-chip (±1A) or a lead-frame (±30A) shunt. A TC-tunable ADC reference compensates for the shunts' large temperature coefficient (TC), resulting in ±0.5% gain error from -40 to 85°C. The CS employs a capacitively coupled gm-boosted front-end followed by a CCO-based Δ Σ ADC. Together with a floating input chopper, this results in an input common-mode range (ICMR) of 0-to-15V, the largest reported for a CS implemented in a standard CMOS process. It achieves high energy efficiency (164dB FoM) while consuming only 720nW, representing a 4 × improvement on the state-of-the-art and making this the first ever reported sub-μ W smart current sensor.
UR - http://www.scopus.com/inward/record.url?scp=85167624212&partnerID=8YFLogxK
U2 - 10.23919/VLSITechnologyandCir57934.2023.10185309
DO - 10.23919/VLSITechnologyandCir57934.2023.10185309
M3 - Conference contribution
AN - SCOPUS:85167624212
SN - 979-8-3503-4669-5
T3 - Digest of Technical Papers - Symposium on VLSI Technology
BT - Proceedings of the 2023 IEEE Symposium on VLSI Technology and Circuits, VLSI Technology and Circuits 2023
PB - IEEE
T2 - 2023 IEEE Symposium on VLSI Technology and Circuits, VLSI Technology and Circuits 2023
Y2 - 11 June 2023 through 16 June 2023
ER -
