A Bluetooth low-energy (BLE) transceiver with TX/RX switchable on-chip matching network, 2.75mW high-IF discrete-time receiver, and 3.6mW all-digital transmitter

F. W. Kuo; Sandro Binsfeld Ferreira; M. Babaie; R. Chen; L. C. Cho; C. P. Jou; F. L. Hsueh; G. Huang; I. Madadi; M. Tohidian; R. B. Staszewski

doi:10.1109/VLSIC.2016.7573480

A Bluetooth low-energy (BLE) transceiver with TX/RX switchable on-chip matching network, 2.75mW high-IF discrete-time receiver, and 3.6mW all-digital transmitter

F. W. Kuo, Sandro Binsfeld Ferreira, M. Babaie, R. Chen, L. C. Cho, C. P. Jou, F. L. Hsueh, G. Huang, I. Madadi, M. Tohidian, R. B. Staszewski

Electronics

Research output: Chapter in Book/Conference proceedings/Edited volume › Conference contribution › Scientific › peer-review

20 Citations (Scopus)

Abstract

We present a new ultra-low-power (ULP) transceiver for Internet-of-Things (IoT) optimized for 28-nm CMOS. The receiver (RX) employs a high-rate (up to 10 GS/s) discrete-time (DT) architecture with intermediate frequency (IF) placed beyond the 1/f noise corner of MOS devices. New multistage multi-rate charge-sharing bandpass filters are adapted to achieve high out-of-band linearity, low noise and low power consumption. A transmitter (TX) employs an all-digital PLL (ADPLL) with switched-current-source digitally controlled oscillator (DCO) and switching PA. An integrated on-chip matching network serves both PA and LNTA, thus allowing a 1-pin direct antenna connection with no external antenna filters. The transceiver consumes 2.75mW in RX and 3.6mW in TX when delivering 0 dBm in Bluetooth LE.

Original language	English
Title of host publication	2016 IEEE Symposium on VLSI Circuits (VLSI-Circuits)
Place of Publication	Piscataway
Publisher	IEEE
Pages	1-2
Number of pages	2
ISBN (Electronic)	978-1-5090-0635-9
ISBN (Print)	978-1-5090-0636-6
DOIs	https://doi.org/10.1109/VLSIC.2016.7573480
Publication status	Published - 22 Sept 2016
Event	30th IEEE Symposium on VLSI Circuits, VLSI Circuits 2016 - Honolulu, United States Duration: 14 Jun 2016 → 17 Jun 2016

Conference

Conference	30th IEEE Symposium on VLSI Circuits, VLSI Circuits 2016
Country/Territory	United States
City	Honolulu
Period	14/06/16 → 17/06/16

Keywords

Bluetooth
Internet of Things
MOS integrated circuits
band-pass filters
oscillators
phase locked loops
radio transceivers
radio transmitters
1-pin direct antenna connection
Bluetooth LE
Bluetooth low-energy transceiver
CMOS
Internet-of-Things
IoT
MOS devices
TX/RX switchable on-chip matching network
The receiver
all-digital PLL
all-digital transmitter
discrete-time architecture
high-IF discrete-time receiver
integrated on-chip matching network
multirate charge-sharing bandpass filters
power 2.75 mW
power 3.6 mW
power consumption
size 28 nm
switched-current-source digitally controlled oscillator
transmitter
ultra-low-power transceiver
Band-pass filters
Capacitors
Gain
Power demand
Switches
System-on-chip
Transceivers

Access to Document

10.1109/VLSIC.2016.7573480

Cite this

Kuo, F. W., Binsfeld Ferreira, S., Babaie, M., Chen, R., Cho, L. C., Jou, C. P., Hsueh, F. L., Huang, G., Madadi, I., Tohidian, M., & Staszewski, R. B. (2016). A Bluetooth low-energy (BLE) transceiver with TX/RX switchable on-chip matching network, 2.75mW high-IF discrete-time receiver, and 3.6mW all-digital transmitter. In 2016 IEEE Symposium on VLSI Circuits (VLSI-Circuits) (pp. 1-2). IEEE. https://doi.org/10.1109/VLSIC.2016.7573480

@inproceedings{72cfa63622c14a189d3290346522ed22,

title = "A Bluetooth low-energy (BLE) transceiver with TX/RX switchable on-chip matching network, 2.75mW high-IF discrete-time receiver, and 3.6mW all-digital transmitter",

abstract = "We present a new ultra-low-power (ULP) transceiver for Internet-of-Things (IoT) optimized for 28-nm CMOS. The receiver (RX) employs a high-rate (up to 10 GS/s) discrete-time (DT) architecture with intermediate frequency (IF) placed beyond the 1/f noise corner of MOS devices. New multistage multi-rate charge-sharing bandpass filters are adapted to achieve high out-of-band linearity, low noise and low power consumption. A transmitter (TX) employs an all-digital PLL (ADPLL) with switched-current-source digitally controlled oscillator (DCO) and switching PA. An integrated on-chip matching network serves both PA and LNTA, thus allowing a 1-pin direct antenna connection with no external antenna filters. The transceiver consumes 2.75mW in RX and 3.6mW in TX when delivering 0 dBm in Bluetooth LE.",

keywords = "Bluetooth, Internet of Things, MOS integrated circuits, band-pass filters, oscillators, phase locked loops, radio transceivers, radio transmitters, 1-pin direct antenna connection, Bluetooth LE, Bluetooth low-energy transceiver, CMOS, Internet-of-Things, IoT, MOS devices, TX/RX switchable on-chip matching network, The receiver, all-digital PLL, all-digital transmitter, discrete-time architecture, high-IF discrete-time receiver, integrated on-chip matching network, multirate charge-sharing bandpass filters, power 2.75 mW, power 3.6 mW, power consumption, size 28 nm, switched-current-source digitally controlled oscillator, transmitter, ultra-low-power transceiver, Band-pass filters, Capacitors, Gain, Power demand, Switches, System-on-chip, Transceivers",

author = "Kuo, {F. W.} and {Binsfeld Ferreira}, Sandro and M. Babaie and R. Chen and Cho, {L. C.} and Jou, {C. P.} and Hsueh, {F. L.} and G. Huang and I. Madadi and M. Tohidian and Staszewski, {R. B.}",

year = "2016",

month = sep,

day = "22",

doi = "10.1109/VLSIC.2016.7573480",

language = "English",

isbn = "978-1-5090-0636-6 ",

pages = "1--2",

booktitle = "2016 IEEE Symposium on VLSI Circuits (VLSI-Circuits)",

publisher = "IEEE",

address = "United States",

note = "30th IEEE Symposium on VLSI Circuits, VLSI Circuits 2016 ; Conference date: 14-06-2016 Through 17-06-2016",

}

Kuo, FW, Binsfeld Ferreira, S, Babaie, M, Chen, R, Cho, LC, Jou, CP, Hsueh, FL, Huang, G, Madadi, I, Tohidian, M & Staszewski, RB 2016, A Bluetooth low-energy (BLE) transceiver with TX/RX switchable on-chip matching network, 2.75mW high-IF discrete-time receiver, and 3.6mW all-digital transmitter. in 2016 IEEE Symposium on VLSI Circuits (VLSI-Circuits). IEEE, Piscataway, pp. 1-2, 30th IEEE Symposium on VLSI Circuits, VLSI Circuits 2016, Honolulu, United States, 14/06/16. https://doi.org/10.1109/VLSIC.2016.7573480

A Bluetooth low-energy (BLE) transceiver with TX/RX switchable on-chip matching network, 2.75mW high-IF discrete-time receiver, and 3.6mW all-digital transmitter. / Kuo, F. W.; Binsfeld Ferreira, Sandro; Babaie, M. et al.
2016 IEEE Symposium on VLSI Circuits (VLSI-Circuits). Piscataway: IEEE, 2016. p. 1-2.

Research output: Chapter in Book/Conference proceedings/Edited volume › Conference contribution › Scientific › peer-review

TY - GEN

T1 - A Bluetooth low-energy (BLE) transceiver with TX/RX switchable on-chip matching network, 2.75mW high-IF discrete-time receiver, and 3.6mW all-digital transmitter

AU - Kuo, F. W.

AU - Binsfeld Ferreira, Sandro

AU - Babaie, M.

AU - Chen, R.

AU - Cho, L. C.

AU - Jou, C. P.

AU - Hsueh, F. L.

AU - Huang, G.

AU - Madadi, I.

AU - Tohidian, M.

AU - Staszewski, R. B.

PY - 2016/9/22

Y1 - 2016/9/22

N2 - We present a new ultra-low-power (ULP) transceiver for Internet-of-Things (IoT) optimized for 28-nm CMOS. The receiver (RX) employs a high-rate (up to 10 GS/s) discrete-time (DT) architecture with intermediate frequency (IF) placed beyond the 1/f noise corner of MOS devices. New multistage multi-rate charge-sharing bandpass filters are adapted to achieve high out-of-band linearity, low noise and low power consumption. A transmitter (TX) employs an all-digital PLL (ADPLL) with switched-current-source digitally controlled oscillator (DCO) and switching PA. An integrated on-chip matching network serves both PA and LNTA, thus allowing a 1-pin direct antenna connection with no external antenna filters. The transceiver consumes 2.75mW in RX and 3.6mW in TX when delivering 0 dBm in Bluetooth LE.

AB - We present a new ultra-low-power (ULP) transceiver for Internet-of-Things (IoT) optimized for 28-nm CMOS. The receiver (RX) employs a high-rate (up to 10 GS/s) discrete-time (DT) architecture with intermediate frequency (IF) placed beyond the 1/f noise corner of MOS devices. New multistage multi-rate charge-sharing bandpass filters are adapted to achieve high out-of-band linearity, low noise and low power consumption. A transmitter (TX) employs an all-digital PLL (ADPLL) with switched-current-source digitally controlled oscillator (DCO) and switching PA. An integrated on-chip matching network serves both PA and LNTA, thus allowing a 1-pin direct antenna connection with no external antenna filters. The transceiver consumes 2.75mW in RX and 3.6mW in TX when delivering 0 dBm in Bluetooth LE.

KW - Bluetooth

KW - Internet of Things

KW - MOS integrated circuits

KW - band-pass filters

KW - oscillators

KW - phase locked loops

KW - radio transceivers

KW - radio transmitters

KW - 1-pin direct antenna connection

KW - Bluetooth LE

KW - Bluetooth low-energy transceiver

KW - CMOS

KW - Internet-of-Things

KW - IoT

KW - MOS devices

KW - TX/RX switchable on-chip matching network

KW - The receiver

KW - all-digital PLL

KW - all-digital transmitter

KW - discrete-time architecture

KW - high-IF discrete-time receiver

KW - integrated on-chip matching network

KW - multirate charge-sharing bandpass filters

KW - power 2.75 mW

KW - power 3.6 mW

KW - power consumption

KW - size 28 nm

KW - switched-current-source digitally controlled oscillator

KW - transmitter

KW - ultra-low-power transceiver

KW - Band-pass filters

KW - Capacitors

KW - Gain

KW - Power demand

KW - Switches

KW - System-on-chip

KW - Transceivers

U2 - 10.1109/VLSIC.2016.7573480

DO - 10.1109/VLSIC.2016.7573480

M3 - Conference contribution

SN - 978-1-5090-0636-6

SP - 1

EP - 2

BT - 2016 IEEE Symposium on VLSI Circuits (VLSI-Circuits)

PB - IEEE

CY - Piscataway

T2 - 30th IEEE Symposium on VLSI Circuits, VLSI Circuits 2016

Y2 - 14 June 2016 through 17 June 2016

ER -

A Bluetooth low-energy (BLE) transceiver with TX/RX switchable on-chip matching network, 2.75mW high-IF discrete-time receiver, and 3.6mW all-digital transmitter

Abstract

Conference

Keywords

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