A cache-based hardware accelerator for memory data movements

F Campos Soares Borrego

Research output: Thesis › Dissertation (TU Delft)

Original language	Undefined/Unknown
Qualification	Doctor of Philosophy
Awarding Institution	Delft University of Technology
Supervisors/Advisors	Goossens, Kees, Supervisor
Award date	13 Oct 2008
Print ISBNs	978-90-72298-01-0
Publication status	Published - 2008

Keywords

@phdthesis{6db3a0d0ef4542e7865ac6ed9d5f70e7,

title = "A cache-based hardware accelerator for memory data movements",

keywords = "authored books, Diss. prom. aan TU Delft",

author = "{Campos Soares Borrego}, F",

year = "2008",

language = "Undefined/Unknown",

isbn = "978-90-72298-01-0",

type = "Dissertation (TU Delft)",

school = "Delft University of Technology",

}