A CMOS smart temperature sensor with a 3¿ inaccuracy of ±0.5°C from -50°C to 120°C

MAP Pertijs, A Niederkorn, X Ma, B McKillop, A Bakker, JH Huijsing

Research output: Contribution to journalArticleScientificpeer-review

100 Citations (Scopus)

Abstract

A low-cost temperature sensor with on-chip sigma-delta ADC and digital bus interface was realized in a 0.5 /spl mu/m CMOS process. Substrate PNP transistors are used for temperature sensing and for generating the ADC's reference voltage. To obtain a high initial accuracy in the readout circuitry, chopper amplifiers and dynamic element matching are used. High linearity is obtained by using second-order curvature correction. With these measures, the sensor's temperature error is dominated by spread on the base-emitter voltage of the PNP transistors. This is trimmed after packaging by comparing the sensor's output with the die temperature measured using an extra on-chip calibration transistor. Compared to traditional calibration techniques, this procedure is much faster and therefore reduces production costs. The sensor is accurate to within /spl plusmn/0.5/spl deg/C (3/spl sigma/) from -50/spl deg/C to 120/spl deg/C.
Original languageUndefined/Unknown
Pages (from-to)454-461
Number of pages8
JournalIEEE Journal of Solid State Circuits
Volume40
Issue number2
DOIs
Publication statusPublished - 2005

Keywords

  • academic journal papers
  • ZX CWTS 1.00 <= JFIS < 3.00

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