Abstract
A novel Graphene/Porous Silicon hybrid device is fabricated and its electrical behaviors are studied along with a Graphene/Silicon device. Graphene (G) is prepared by exfoliation of graphite foil in aqueous solution of inorganic salt. Porous Silicon (PS) is fabricated by electrochemical etching of p-type Si. Graphene is deposited on the surface of Si and PS substrates by the Thermal Spray Pyrolysis (TSP) method. The current-voltage relationships of G/Si and G/PS devices are derived and studied under different volumes of graphene. The results reveal that there are important differences in the I–V characteristics of G/Si and G/PS devices in the forward as well as reverse bias. Furthermore, varying the volume of graphene deposition on Si and PS substrates have contrary effects on their I–V characteristics.
| Original language | English |
|---|---|
| Pages (from-to) | 387-393 |
| Number of pages | 7 |
| Journal | Superlattices and Microstructures |
| Volume | 122 |
| DOIs | |
| Publication status | Published - 2018 |
Keywords
- Electrical properties
- Microporous materials
- Microstructures
- Raman spectroscopy
- Semiconductors