Abstract
This work presents a cryo-CMOS smart temperature sensor operating from room temperature down to 5 K. By adopting sensing elements (CMOS bulk diodes, pMOS/DTMOS in weak inversion) that circumvent the poor cryogenic performance of Si BJTs, a robust switched-capacitor second-order sigma–delta readout and cryogenic-aware design techniques, the sensor achieves a maximum error of ±0.73 K (four samples and two-point trim), a resolution below 0.05 K for a 102.4-ms readout duration, and a power consumption of 15.5 µW 93.5 µW) at 5 K (296 K).
| Original language | English |
|---|---|
| Pages (from-to) | 29-32 |
| Number of pages | 4 |
| Journal | IEEE Solid-State Circuits Letters |
| Volume | 9 |
| DOIs | |
| Publication status | Published - 2026 |
Keywords
- Analog to digital conversion
- bulk CMOS
- CMOS
- cryo-CMOS
- cryogenic
- diode
- oversampled
- reference
- temperature sensor