A DfT architecture and tool flow for 3-D SICs with test data compression, embedded cores, and multiple towers

C Papameletis, B Keller, V Chickermane, S Hamdioui, EJ Marinissen

Research output: Contribution to journalArticleProfessional

10 Citations (Scopus)
Original languageEnglish
Pages (from-to)40-48
Number of pages9
JournalIEEE Design & Test
Volume32
Issue number4
DOIs
Publication statusPublished - 2015

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