RISC-V is an open and modular Instruction Set Architecture(ISA) which is rapidly growing in popularity in terrestrial applications. This paper presents the place in future space embedded systems ESA's roadmap for RISC-V based processors. In order to satisfy different applications with contrasting requirements in satellite data systems, four different types of processors are identified: 1) General-Purpose (GP) processors for payloads 2) main platform On-Board Computers (OBCs) controllers 3) low-area/low-power microcontrollers (uCs), 4) enhanced payload processors with support for Artificial Intelligence (AI). We also describe the state of the art of the RISC-V software ecosystem, including the currently available hardware platforms, with a focus on developments for space applications and what has already been done in the European Space Industry. Finally, planned activities are presented, with a focus on the role of the European ecosystem.
|Title of host publication||2022 IEEE Aerospace Conference, AERO 2022|
|Number of pages||7|
|Publication status||Published - 2022|
|Event||2022 IEEE Aerospace Conference (AERO) - Big Sky, United States|
Duration: 5 Mar 2022 → 12 Mar 2022
|Name||IEEE Aerospace Conference Proceedings|
|Conference||2022 IEEE Aerospace Conference (AERO)|
|Period||5/03/22 → 12/03/22|
Bibliographical noteGreen Open Access added to TU Delft Institutional Repository ‘You share, we take care!’ – Taverne project https://www.openaccess.nl/en/you-share-we-take-care
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