A European Roadmap to Leverage RISC-V in Space Applications

Gianluca Furano, S. Di Mascio, A. Menicucci, Claudio Monteleone

Research output: Chapter in Book/Conference proceedings/Edited volumeConference contributionScientificpeer-review

1 Citation (Scopus)
32 Downloads (Pure)


RISC-V is an open and modular Instruction Set Architecture(ISA) which is rapidly growing in popularity in terrestrial applications. This paper presents the place in future space embedded systems ESA's roadmap for RISC-V based processors. In order to satisfy different applications with contrasting requirements in satellite data systems, four different types of processors are identified: 1) General-Purpose (GP) processors for payloads 2) main platform On-Board Computers (OBCs) controllers 3) low-area/low-power microcontrollers (uCs), 4) enhanced payload processors with support for Artificial Intelligence (AI). We also describe the state of the art of the RISC-V software ecosystem, including the currently available hardware platforms, with a focus on developments for space applications and what has already been done in the European Space Industry. Finally, planned activities are presented, with a focus on the role of the European ecosystem.
Original languageEnglish
Title of host publication2022 IEEE Aerospace Conference, AERO 2022
Number of pages7
Publication statusPublished - 2022
Event2022 IEEE Aerospace Conference (AERO) - Big Sky, United States
Duration: 5 Mar 202212 Mar 2022

Publication series

NameIEEE Aerospace Conference Proceedings
ISSN (Print)1095-323X


Conference2022 IEEE Aerospace Conference (AERO)
Country/TerritoryUnited States
CityBig Sky

Bibliographical note

Green Open Access added to TU Delft Institutional Repository ‘You share, we take care!’ – Taverne project https://www.openaccess.nl/en/you-share-we-take-care
Otherwise as indicated in the copyright section: the publisher is the copyright holder of this work and the author uses the Dutch legislation to make this work public.


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