A Fault-Tolerant Technique for Nanocomputers: NAND Multiplexing

Jie Han, PP Jonker

    Research output: Chapter in Book/Conference proceedings/Edited volumeConference contributionScientific


    In order to make systems based on nanometerscale devices reliable, the design of faulttolerant architectures will be necessary. This paper presents a novel faulttolerant technique for future nanocomputers, NAND multiplexing. Initiated by von Neumann, the NAND multiplexing technique, based on a massive duplication of imperfect devices and randomized imperfect interconnect, had been studied with an extreme high degree of redundancy (A 4333). In this paper, the NAND multiplexing is extended to rather low degree of redundancy, leading it to a comprehensive faulttolerant theory. The stochastic Markov nature in the heart of the system is discovered, and the characteristics of such a Markov chain are exploited. This faulttolerant technique is potentially useful for future nanoelectronics. Keywords: Markov Process, Normal Distribution, Binomial Distribution
    Original languageUndefined/Unknown
    Title of host publicationProceedings ASCI 2002
    EditorsEF Deprettere, A Belloum, JWJ Heijnsdijk, F van der Stappen
    Place of PublicationDelft
    Number of pages8
    ISBN (Print)90-803086-6-8
    Publication statusPublished - 2002
    Event8th Annual Conf. of the Advanced School for Computing and Imaging, Lochem - Delft
    Duration: 19 Jun 200221 Jun 2002

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    Conference8th Annual Conf. of the Advanced School for Computing and Imaging, Lochem

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