TY - JOUR
T1 - A Front-End ASIC With High-Voltage Transmit Switching and Receive Digitization for 3-D Forward-Looking Intravascular Ultrasound Imaging
AU - Tan, Mingliang
AU - Chen, Chao
AU - Chen, Zhao
AU - Janjic, Jovana
AU - Daeichin, Verya
AU - Chang, Zu-Yao
AU - Noothout, Emile
AU - van Soest, Gijs
AU - Verweij, Martin D.
AU - de Jong, Nico
AU - Pertijs, Michiel A.P.
N1 - Accepted author manuscript
PY - 2018
Y1 - 2018
N2 - This paper presents an area- and power-efficient application-specified integrated circuit (ASIC) for 3-D forward-looking intravascular ultrasound imaging. The ASIC is intended to be mounted at the tip of a catheter, and has a circular active area with a diameter of 1.5 mm on the top of which a 2-D array of piezoelectric transducer elements is integrated. It requires only four micro-coaxial cables to interface 64 receive (RX) elements and 16 transmit (TX) elements with an imaging system. To do so, it routes high-voltage (HV) pulses generated by the system to selected TX elements using compact HV switch circuits, digitizes the resulting echo signal received by a selected RX element locally, and employs an energy-efficient load-modulation datalink to return the digitized echo signal to the system in a robust manner. A multi-functional command line provides the required sampling clock, configuration data, and supply voltage for the HV switches. The ASIC has been realized in a 0.18-μm HV CMOS technology and consumes only 9.1 mW. Electrical measurements show 28-V HV switching and RX digitization with a 16-MHz bandwidth and 53-dB dynamic range. Acoustical measurements demonstrate successful pulse transmission and reception. Finally, a 3-D ultrasound image of a three-needle phantom is generated to demonstrate the imaging capability.
AB - This paper presents an area- and power-efficient application-specified integrated circuit (ASIC) for 3-D forward-looking intravascular ultrasound imaging. The ASIC is intended to be mounted at the tip of a catheter, and has a circular active area with a diameter of 1.5 mm on the top of which a 2-D array of piezoelectric transducer elements is integrated. It requires only four micro-coaxial cables to interface 64 receive (RX) elements and 16 transmit (TX) elements with an imaging system. To do so, it routes high-voltage (HV) pulses generated by the system to selected TX elements using compact HV switch circuits, digitizes the resulting echo signal received by a selected RX element locally, and employs an energy-efficient load-modulation datalink to return the digitized echo signal to the system in a robust manner. A multi-functional command line provides the required sampling clock, configuration data, and supply voltage for the HV switches. The ASIC has been realized in a 0.18-μm HV CMOS technology and consumes only 9.1 mW. Electrical measurements show 28-V HV switching and RX digitization with a 16-MHz bandwidth and 53-dB dynamic range. Acoustical measurements demonstrate successful pulse transmission and reception. Finally, a 3-D ultrasound image of a three-needle phantom is generated to demonstrate the imaging capability.
KW - Cable-count reduction
KW - Catheters
KW - high-voltage (HV) switching
KW - Imaging
KW - Impedance
KW - intravascular ultrasound (IVUS) imaging
KW - piezoelectrical transducer
KW - receive digitization
KW - Switches
KW - Transducers
KW - Ultrasonic imaging
KW - Wires
UR - http://www.scopus.com/inward/record.url?scp=85046742055&partnerID=8YFLogxK
U2 - 10.1109/JSSC.2018.2828826
DO - 10.1109/JSSC.2018.2828826
M3 - Article
AN - SCOPUS:85046742055
SN - 0018-9200
VL - 53
SP - 2284
EP - 2297
JO - IEEE Journal of Solid State Circuits
JF - IEEE Journal of Solid State Circuits
IS - 8
ER -