A Fully Integrated ±5A Current-Sensing System with ±0.25% Gain Error and 12uA Offset from -40°C to +85°C

S Heidary Shalmany; G Beer; D Draxelmayr; KAA Makinwa

doi:10.1109/VLSIC.2015.7231298

A Fully Integrated ±5A Current-Sensing System with ±0.25% Gain Error and 12uA Offset from -40°C to +85°C

S Heidary Shalmany, G Beer, D Draxelmayr, KAA Makinwa

Electronic Instrumentation

Research output: Chapter in Book/Conference proceedings/Edited volume › Conference contribution › Scientific › peer-review

3 Citations (Scopus)

Original language	English
Title of host publication	Proceedings of the Symposium on VLSI Circuits
Editors	M Motomura
Place of Publication	Piscataway
Publisher	IEEE
Pages	C298-C299
ISBN (Print)	978-4-86348-502-0
DOIs	https://doi.org/10.1109/VLSIC.2015.7231298
Publication status	Published - 2015
Event	VLSI Circuits 2015, Kyoto, Japan - Piscataway Duration: 17 Jun 2015 → 19 Jun 2015

Publication series

Name
Publisher	IEEE

Conference

Conference	VLSI Circuits 2015, Kyoto, Japan
Period	17/06/15 → 19/06/15

Access to Document

10.1109/VLSIC.2015.7231298

Cite this

@inproceedings{eb4aeb2b31194e1fbaf9f2dccb2fbf3d,

title = "A Fully Integrated ±5A Current-Sensing System with ±0.25% Gain Error and 12uA Offset from -40°C to +85°C",

author = "{Heidary Shalmany}, S and G Beer and D Draxelmayr and KAA Makinwa",

year = "2015",

doi = "10.1109/VLSIC.2015.7231298",

language = "English",

isbn = "978-4-86348-502-0",

publisher = "IEEE",

pages = "C298--C299",

editor = "M Motomura",

booktitle = "Proceedings of the Symposium on VLSI Circuits",

address = "United States",

note = "VLSI Circuits 2015, Kyoto, Japan ; Conference date: 17-06-2015 Through 19-06-2015",

}

A Fully Integrated ±5A Current-Sensing System with ±0.25% Gain Error and 12uA Offset from -40°C to +85°C. / Heidary Shalmany, S; Beer, G; Draxelmayr, D et al.
Proceedings of the Symposium on VLSI Circuits. ed. / M Motomura. Piscataway: IEEE, 2015. p. C298-C299.

Research output: Chapter in Book/Conference proceedings/Edited volume › Conference contribution › Scientific › peer-review

TY - GEN

T1 - A Fully Integrated ±5A Current-Sensing System with ±0.25% Gain Error and 12uA Offset from -40°C to +85°C

AU - Heidary Shalmany, S

AU - Beer, G

AU - Draxelmayr, D

AU - Makinwa, KAA

PY - 2015

Y1 - 2015

U2 - 10.1109/VLSIC.2015.7231298

DO - 10.1109/VLSIC.2015.7231298

M3 - Conference contribution

SN - 978-4-86348-502-0

SP - C298-C299

BT - Proceedings of the Symposium on VLSI Circuits

A2 - Motomura, M

PB - IEEE

CY - Piscataway

T2 - VLSI Circuits 2015, Kyoto, Japan

Y2 - 17 June 2015 through 19 June 2015

ER -