A GaN Driver with Almost Constant dv/dt during Miller Plateau for V-I Overlap Loss Reduction

Yunzhe Yang; Qiujin Chen; Zaitian Yang; Sijun Du; Mo Huang

doi:10.1109/ISCAS58744.2024.10558071

A GaN Driver with Almost Constant dv/dt during Miller Plateau for V-I Overlap Loss Reduction

Yunzhe Yang, Qiujin Chen, Zaitian Yang, Sijun Du, Mo Huang^*

^*Corresponding author for this work

Electronic Instrumentation

Research output: Chapter in Book/Conference proceedings/Edited volume › Conference contribution › Scientific › peer-review

16 Downloads (Pure)

Abstract

When driving a GaN switch, the maximum transition speed of drain-source voltage (peak dv/dt) should meet specification. But reducing the peak dv/dt usually exacerbates V-I overlap loss. This work presents a GaN driver for buck converter featuring: 1) voltage-controlled peak dv/dt; 2) almost constant dv/dt during Miller Plateau (MP) for reducing V-I overlap loss. We analyze why a constant dv/dt minimizes V-I overlap loss under a peak dv/dt specification, how to maintain a constant dv/dt during the MP period, and propose an implementable solution. We use a sensing block to judge whether the peak dv/dt violates the specification, and an adaptive searching scheme to find out the key parameters for the targeted constant dv/dt. We designed the layout with a 180-nm SOI process, and simulation results show that the peak dv/dt is well under control. It saves up to 33.99% V-I overlap loss when compared with the conventional constant current driver scheme.

Original language	English
Title of host publication	ISCAS 2024 - IEEE International Symposium on Circuits and Systems
Publisher	IEEE
Number of pages	5
ISBN (Electronic)	9798350330991
DOIs	https://doi.org/10.1109/ISCAS58744.2024.10558071
Publication status	Published - 2024
Event	2024 IEEE International Symposium on Circuits and Systems, ISCAS 2024 - Singapore, Singapore Duration: 19 May 2024 → 22 May 2024

Publication series

Name	Proceedings - IEEE International Symposium on Circuits and Systems
ISSN (Print)	0271-4310

Conference

Conference	2024 IEEE International Symposium on Circuits and Systems, ISCAS 2024
Country/Territory	Singapore
City	Singapore
Period	19/05/24 → 22/05/24

Bibliographical note

Green Open Access added to TU Delft Institutional Repository ‘You share, we take care!’ – Taverne project https://www.openaccess.nl/en/you-share-we-take-care
Otherwise as indicated in the copyright section: the publisher is the copyright holder of this work and the author uses the Dutch legislation to make this work public.

Keywords

buck converter
dv/dt
EMI
GaN
Miller Plateau
V-I overlap loss

Access to Document

10.1109/ISCAS58744.2024.10558071

A_GaN_Driver_with_Almost_Constant_dv_dt_during_Miller_Plateau_for_V-I_Overlap_Loss_ReductionFinal published version, 2.42 MB

Cite this

@inproceedings{414b4f457f7848e39a08214bac4a44cf,

title = "A GaN Driver with Almost Constant dv/dt during Miller Plateau for V-I Overlap Loss Reduction",

abstract = "When driving a GaN switch, the maximum transition speed of drain-source voltage (peak dv/dt) should meet specification. But reducing the peak dv/dt usually exacerbates V-I overlap loss. This work presents a GaN driver for buck converter featuring: 1) voltage-controlled peak dv/dt; 2) almost constant dv/dt during Miller Plateau (MP) for reducing V-I overlap loss. We analyze why a constant dv/dt minimizes V-I overlap loss under a peak dv/dt specification, how to maintain a constant dv/dt during the MP period, and propose an implementable solution. We use a sensing block to judge whether the peak dv/dt violates the specification, and an adaptive searching scheme to find out the key parameters for the targeted constant dv/dt. We designed the layout with a 180-nm SOI process, and simulation results show that the peak dv/dt is well under control. It saves up to 33.99% V-I overlap loss when compared with the conventional constant current driver scheme.",

keywords = "buck converter, dv/dt, EMI, GaN, Miller Plateau, V-I overlap loss",

author = "Yunzhe Yang and Qiujin Chen and Zaitian Yang and Sijun Du and Mo Huang",

note = "Green Open Access added to TU Delft Institutional Repository {\textquoteleft}You share, we take care!{\textquoteright} – Taverne project https://www.openaccess.nl/en/you-share-we-take-care Otherwise as indicated in the copyright section: the publisher is the copyright holder of this work and the author uses the Dutch legislation to make this work public. ; 2024 IEEE International Symposium on Circuits and Systems, ISCAS 2024 ; Conference date: 19-05-2024 Through 22-05-2024",

year = "2024",

doi = "10.1109/ISCAS58744.2024.10558071",

language = "English",

series = "Proceedings - IEEE International Symposium on Circuits and Systems",

publisher = "IEEE",

booktitle = "ISCAS 2024 - IEEE International Symposium on Circuits and Systems",

address = "United States",

}

Yang, Y, Chen, Q, Yang, Z, Du, S & Huang, M 2024, A GaN Driver with Almost Constant dv/dt during Miller Plateau for V-I Overlap Loss Reduction. in ISCAS 2024 - IEEE International Symposium on Circuits and Systems. Proceedings - IEEE International Symposium on Circuits and Systems, IEEE, 2024 IEEE International Symposium on Circuits and Systems, ISCAS 2024, Singapore, Singapore, 19/05/24. https://doi.org/10.1109/ISCAS58744.2024.10558071

A GaN Driver with Almost Constant dv/dt during Miller Plateau for V-I Overlap Loss Reduction. / Yang, Yunzhe; Chen, Qiujin; Yang, Zaitian et al.
ISCAS 2024 - IEEE International Symposium on Circuits and Systems. IEEE, 2024. (Proceedings - IEEE International Symposium on Circuits and Systems).

Research output: Chapter in Book/Conference proceedings/Edited volume › Conference contribution › Scientific › peer-review

TY - GEN

T1 - A GaN Driver with Almost Constant dv/dt during Miller Plateau for V-I Overlap Loss Reduction

AU - Yang, Yunzhe

AU - Chen, Qiujin

AU - Yang, Zaitian

AU - Du, Sijun

AU - Huang, Mo

N1 - Green Open Access added to TU Delft Institutional Repository ‘You share, we take care!’ – Taverne project https://www.openaccess.nl/en/you-share-we-take-care Otherwise as indicated in the copyright section: the publisher is the copyright holder of this work and the author uses the Dutch legislation to make this work public.

PY - 2024

Y1 - 2024

N2 - When driving a GaN switch, the maximum transition speed of drain-source voltage (peak dv/dt) should meet specification. But reducing the peak dv/dt usually exacerbates V-I overlap loss. This work presents a GaN driver for buck converter featuring: 1) voltage-controlled peak dv/dt; 2) almost constant dv/dt during Miller Plateau (MP) for reducing V-I overlap loss. We analyze why a constant dv/dt minimizes V-I overlap loss under a peak dv/dt specification, how to maintain a constant dv/dt during the MP period, and propose an implementable solution. We use a sensing block to judge whether the peak dv/dt violates the specification, and an adaptive searching scheme to find out the key parameters for the targeted constant dv/dt. We designed the layout with a 180-nm SOI process, and simulation results show that the peak dv/dt is well under control. It saves up to 33.99% V-I overlap loss when compared with the conventional constant current driver scheme.

AB - When driving a GaN switch, the maximum transition speed of drain-source voltage (peak dv/dt) should meet specification. But reducing the peak dv/dt usually exacerbates V-I overlap loss. This work presents a GaN driver for buck converter featuring: 1) voltage-controlled peak dv/dt; 2) almost constant dv/dt during Miller Plateau (MP) for reducing V-I overlap loss. We analyze why a constant dv/dt minimizes V-I overlap loss under a peak dv/dt specification, how to maintain a constant dv/dt during the MP period, and propose an implementable solution. We use a sensing block to judge whether the peak dv/dt violates the specification, and an adaptive searching scheme to find out the key parameters for the targeted constant dv/dt. We designed the layout with a 180-nm SOI process, and simulation results show that the peak dv/dt is well under control. It saves up to 33.99% V-I overlap loss when compared with the conventional constant current driver scheme.

KW - buck converter

KW - dv/dt

KW - EMI

KW - GaN

KW - Miller Plateau

KW - V-I overlap loss

UR - http://www.scopus.com/inward/record.url?scp=85198538138&partnerID=8YFLogxK

U2 - 10.1109/ISCAS58744.2024.10558071

DO - 10.1109/ISCAS58744.2024.10558071

M3 - Conference contribution

AN - SCOPUS:85198538138

T3 - Proceedings - IEEE International Symposium on Circuits and Systems

BT - ISCAS 2024 - IEEE International Symposium on Circuits and Systems

PB - IEEE

T2 - 2024 IEEE International Symposium on Circuits and Systems, ISCAS 2024

Y2 - 19 May 2024 through 22 May 2024

ER -

A GaN Driver with Almost Constant dv/dt during Miller Plateau for V-I Overlap Loss Reduction

Abstract

Publication series

Conference

Bibliographical note

Keywords

Access to Document

Other files and links

Fingerprint

Cite this