A Low Dark Count p-i-n Diode Based SPAD in CMOS Technology

C Veerappan; E Charbon

doi:10.1109/TED.2015.2475355

A Low Dark Count p-i-n Diode Based SPAD in CMOS Technology

C Veerappan, E Charbon

Signal Processing Systems

Research output: Contribution to journal › Article › Scientific › peer-review

68 Citations (Scopus)

Abstract

In this paper, a novel CMOS single-photon avalanche diode (SPAD) is presented, and the device is designed using a vertical p-i-n diode construction. The p-i-n diode with a wide depletion region enables a low-noise operation. The proposed design achieves dark count rates of 1.5 cps/μm2 at 11 V excess bias, while the photon detection probability (PDP) is greater than 40% from 460 to 600 nm. Through the operation at very high excess bias voltages, it is possible to reach the PDP compression point where sensitivity to the breakdown voltage is low, thus ensuring high PDP uniformity; this feature makes it, especially, suitable for multimegapixel SPAD arrays.

Original language	English
Pages (from-to)	65-71
Number of pages	7
Journal	IEEE Transactions on Electron Devices
Volume	63
Issue number	1
DOIs	https://doi.org/10.1109/TED.2015.2475355
Publication status	Published - 18 Sept 2015

Keywords

wide depletion
CMOS
p-i-n
single-photon avalanche diode (SPAD)
substrate isolation

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10.1109/TED.2015.2475355

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title = "A Low Dark Count p-i-n Diode Based SPAD in CMOS Technology",

abstract = "In this paper, a novel CMOS single-photon avalanche diode (SPAD) is presented, and the device is designed using a vertical p-i-n diode construction. The p-i-n diode with a wide depletion region enables a low-noise operation. The proposed design achieves dark count rates of 1.5 cps/μm2 at 11 V excess bias, while the photon detection probability (PDP) is greater than 40% from 460 to 600 nm. Through the operation at very high excess bias voltages, it is possible to reach the PDP compression point where sensitivity to the breakdown voltage is low, thus ensuring high PDP uniformity; this feature makes it, especially, suitable for multimegapixel SPAD arrays.",

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N2 - In this paper, a novel CMOS single-photon avalanche diode (SPAD) is presented, and the device is designed using a vertical p-i-n diode construction. The p-i-n diode with a wide depletion region enables a low-noise operation. The proposed design achieves dark count rates of 1.5 cps/μm2 at 11 V excess bias, while the photon detection probability (PDP) is greater than 40% from 460 to 600 nm. Through the operation at very high excess bias voltages, it is possible to reach the PDP compression point where sensitivity to the breakdown voltage is low, thus ensuring high PDP uniformity; this feature makes it, especially, suitable for multimegapixel SPAD arrays.

AB - In this paper, a novel CMOS single-photon avalanche diode (SPAD) is presented, and the device is designed using a vertical p-i-n diode construction. The p-i-n diode with a wide depletion region enables a low-noise operation. The proposed design achieves dark count rates of 1.5 cps/μm2 at 11 V excess bias, while the photon detection probability (PDP) is greater than 40% from 460 to 600 nm. Through the operation at very high excess bias voltages, it is possible to reach the PDP compression point where sensitivity to the breakdown voltage is low, thus ensuring high PDP uniformity; this feature makes it, especially, suitable for multimegapixel SPAD arrays.

KW - wide depletion

KW - CMOS

KW - p-i-n

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KW - substrate isolation

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JO - IEEE Transactions on Electron Devices

JF - IEEE Transactions on Electron Devices

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A Low Dark Count p-i-n Diode Based SPAD in CMOS Technology

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Keywords

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