A low-power all-digital PLL architecture based on phase prediction

JC Zhuang, RB Staszewski

Research output: Chapter in Book/Conference proceedings/Edited volumeConference contributionScientificpeer-review

16 Citations (Scopus)
Original languageEnglish
Title of host publicationProceedings 2012 19th IEEE International Conference on Electronics, Circuits and Systems
EditorsM Delgado-Restituto, M Bayoumi, A Rodríguez-Vásquez
Place of PublicationPiscataway, NJ, USA
PublisherIEEE Society
Pages797-800
Number of pages4
ISBN (Print)1078-1-4673-1260-8
DOIs
Publication statusPublished - 2012
EventICECS 2012, Seville, Spain - Piscataway, NJ, USA
Duration: 9 Dec 201212 Dec 2012

Publication series

Name
PublisherIEEE

Conference

ConferenceICECS 2012, Seville, Spain
Period9/12/1212/12/12

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