A Low-Power Digitally-Programmable Variable Gain Amplifier in 65 nm CMOS

Amir Zjajo; Mingxin Song

doi:10.1145/1840845.1840868

A Low-Power Digitally-Programmable Variable Gain Amplifier in 65 nm CMOS

Amir Zjajo, Mingxin Song

Signal Processing Systems

Research output: Chapter in Book/Conference proceedings/Edited volume › Conference contribution › Scientific › peer-review

1 Citation (Scopus)

Abstract

This paper reports a new topology for a switched-capacitor variable gain amplifier (SC-VGA), which allows discrete-time periodic analog signal generation and in essence fulfils the function of the D/A converter. The proposed circuit exploits a pipelined, cascaded gain stages, which leads to simpler circuit implementation, lower power consumption and reduced kT/C noise, compared to the conventional implementation. The method has the attributes of digital programming and control capability, robustness and reduced area overhead. The two-stage SC-VGA has been fabricated in standard single poly, 65-nm CMOS with the core area of 0.17 mm² and shows the maximum gain variation of 70 dB and 81 dB linear range, while consuming 11 mW.

Original language	English
Title of host publication	Proceedings of the 16th ACM/IEEE International Symposium on Lowe-power Electronics and Design, ISPLED 2010
Place of Publication	Los Alamitos, CA
Publisher	IEEE
Pages	105-110
Number of pages	6
ISBN (Electronic)	978-1-60558-684-7
ISBN (Print)	978-1-4244-8588-8
DOIs	https://doi.org/10.1145/1840845.1840868
Publication status	Published - 2010
Event	16th ACM/IEEE International Symposium on Low Power Electronics and Design, ISLPED'10 - Omni Hotel, Austin, TX, United States Duration: 18 Aug 2010 → 20 Aug 2010

Conference

Conference	16th ACM/IEEE International Symposium on Low Power Electronics and Design, ISLPED'10
Abbreviated title	ISLPED 2010
Country/Territory	United States
City	Austin, TX
Period	18/08/10 → 20/08/10

Keywords

discrete-time amplifier
Variable gain amplifier
waveform generator

Access to Document

10.1145/1840845.1840868

Cite this

@inproceedings{bab6d45dd7ab45fd8efc5953974f1f96,

title = "A Low-Power Digitally-Programmable Variable Gain Amplifier in 65 nm CMOS",

abstract = "This paper reports a new topology for a switched-capacitor variable gain amplifier (SC-VGA), which allows discrete-time periodic analog signal generation and in essence fulfils the function of the D/A converter. The proposed circuit exploits a pipelined, cascaded gain stages, which leads to simpler circuit implementation, lower power consumption and reduced kT/C noise, compared to the conventional implementation. The method has the attributes of digital programming and control capability, robustness and reduced area overhead. The two-stage SC-VGA has been fabricated in standard single poly, 65-nm CMOS with the core area of 0.17 mm2 and shows the maximum gain variation of 70 dB and 81 dB linear range, while consuming 11 mW.",

keywords = "discrete-time amplifier, Variable gain amplifier, waveform generator",

author = "Amir Zjajo and Mingxin Song",

year = "2010",

doi = "10.1145/1840845.1840868",

language = "English",

isbn = "978-1-4244-8588-8",

pages = "105--110",

booktitle = "Proceedings of the 16th ACM/IEEE International Symposium on Lowe-power Electronics and Design, ISPLED 2010",

publisher = "IEEE",

address = "United States",

note = "16th ACM/IEEE International Symposium on Low Power Electronics and Design, ISLPED'10, ISLPED 2010 ; Conference date: 18-08-2010 Through 20-08-2010",

}

Zjajo, A & Song, M 2010, A Low-Power Digitally-Programmable Variable Gain Amplifier in 65 nm CMOS. in Proceedings of the 16th ACM/IEEE International Symposium on Lowe-power Electronics and Design, ISPLED 2010. IEEE, Los Alamitos, CA, pp. 105-110, 16th ACM/IEEE International Symposium on Low Power Electronics and Design, ISLPED'10, Austin, TX, United States, 18/08/10. https://doi.org/10.1145/1840845.1840868

A Low-Power Digitally-Programmable Variable Gain Amplifier in 65 nm CMOS. / Zjajo, Amir; Song, Mingxin.
Proceedings of the 16th ACM/IEEE International Symposium on Lowe-power Electronics and Design, ISPLED 2010. Los Alamitos, CA: IEEE, 2010. p. 105-110.

Research output: Chapter in Book/Conference proceedings/Edited volume › Conference contribution › Scientific › peer-review

TY - GEN

T1 - A Low-Power Digitally-Programmable Variable Gain Amplifier in 65 nm CMOS

AU - Zjajo, Amir

AU - Song, Mingxin

PY - 2010

Y1 - 2010

N2 - This paper reports a new topology for a switched-capacitor variable gain amplifier (SC-VGA), which allows discrete-time periodic analog signal generation and in essence fulfils the function of the D/A converter. The proposed circuit exploits a pipelined, cascaded gain stages, which leads to simpler circuit implementation, lower power consumption and reduced kT/C noise, compared to the conventional implementation. The method has the attributes of digital programming and control capability, robustness and reduced area overhead. The two-stage SC-VGA has been fabricated in standard single poly, 65-nm CMOS with the core area of 0.17 mm2 and shows the maximum gain variation of 70 dB and 81 dB linear range, while consuming 11 mW.

AB - This paper reports a new topology for a switched-capacitor variable gain amplifier (SC-VGA), which allows discrete-time periodic analog signal generation and in essence fulfils the function of the D/A converter. The proposed circuit exploits a pipelined, cascaded gain stages, which leads to simpler circuit implementation, lower power consumption and reduced kT/C noise, compared to the conventional implementation. The method has the attributes of digital programming and control capability, robustness and reduced area overhead. The two-stage SC-VGA has been fabricated in standard single poly, 65-nm CMOS with the core area of 0.17 mm2 and shows the maximum gain variation of 70 dB and 81 dB linear range, while consuming 11 mW.

KW - discrete-time amplifier

KW - Variable gain amplifier

KW - waveform generator

U2 - 10.1145/1840845.1840868

DO - 10.1145/1840845.1840868

M3 - Conference contribution

SN - 978-1-4244-8588-8

SP - 105

EP - 110

BT - Proceedings of the 16th ACM/IEEE International Symposium on Lowe-power Electronics and Design, ISPLED 2010

PB - IEEE

CY - Los Alamitos, CA

T2 - 16th ACM/IEEE International Symposium on Low Power Electronics and Design, ISLPED'10

Y2 - 18 August 2010 through 20 August 2010

ER -

A Low-Power Digitally-Programmable Variable Gain Amplifier in 65 nm CMOS

Abstract

Conference

Keywords

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