A Low-Power Digitally-Programmable Variable Gain Amplifier in 65 nm CMOS

Amir Zjajo, Mingxin Song

Research output: Chapter in Book/Conference proceedings/Edited volumeConference contributionScientificpeer-review

1 Citation (Scopus)

Abstract

This paper reports a new topology for a switched-capacitor variable gain amplifier (SC-VGA), which allows discrete-time periodic analog signal generation and in essence fulfils the function of the D/A converter. The proposed circuit exploits a pipelined, cascaded gain stages, which leads to simpler circuit implementation, lower power consumption and reduced kT/C noise, compared to the conventional implementation. The method has the attributes of digital programming and control capability, robustness and reduced area overhead. The two-stage SC-VGA has been fabricated in standard single poly, 65-nm CMOS with the core area of 0.17 mm2 and shows the maximum gain variation of 70 dB and 81 dB linear range, while consuming 11 mW.


Original languageEnglish
Title of host publicationProceedings of the 16th ACM/IEEE International Symposium on Lowe-power Electronics and Design, ISPLED 2010
Place of PublicationLos Alamitos, CA
PublisherIEEE
Pages105-110
Number of pages6
ISBN (Electronic)978-1-60558-684-7
ISBN (Print)978-1-4244-8588-8
DOIs
Publication statusPublished - 2010
Event16th ACM/IEEE International Symposium on Low Power Electronics and Design, ISLPED'10 - Omni Hotel, Austin, TX, United States
Duration: 18 Aug 201020 Aug 2010

Conference

Conference16th ACM/IEEE International Symposium on Low Power Electronics and Design, ISLPED'10
Abbreviated titleISLPED 2010
CountryUnited States
CityAustin, TX
Period18/08/1020/08/10

Keywords

  • discrete-time amplifier
  • Variable gain amplifier
  • waveform generator

Fingerprint

Dive into the research topics of 'A Low-Power Digitally-Programmable Variable Gain Amplifier in 65 nm CMOS'. Together they form a unique fingerprint.

Cite this