Abstract
Power and area efficient on-chip feature extraction is needed for future closed-loop neural interfaces. This paper presents a feature extraction unit for neural oscillatory synchrony that bypasses the phase extraction step to reduce hardware complexity. Instead, the sine and cosine of the phase are directly approximated from the real and imaginary components of the signal to calculate the phase-amplitude coupling (PAC) and phase locking value (PLV). The synthesized design achieves state-of-the-art performances at 43 nW/channel and 0.006 mm2, while maintaining sufficient accuracy for seizure detection in epileptic patients.
Original language | English |
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Title of host publication | ISCAS 2023 - 56th IEEE International Symposium on Circuits and Systems, Proceedings |
Publisher | IEEE |
Number of pages | 5 |
ISBN (Electronic) | 9781665451093 |
DOIs | |
Publication status | Published - 2023 |
Event | 56th IEEE International Symposium on Circuits and Systems, ISCAS 2023 - Monterey, United States Duration: 21 May 2023 → 25 May 2023 |
Publication series
Name | Proceedings - IEEE International Symposium on Circuits and Systems |
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Volume | 2023-May |
ISSN (Print) | 0271-4310 |
Conference
Conference | 56th IEEE International Symposium on Circuits and Systems, ISCAS 2023 |
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Country/Territory | United States |
City | Monterey |
Period | 21/05/23 → 25/05/23 |
Bibliographical note
Green Open Access added to TU Delft Institutional Repository ‘You share, we take care!’ – Taverne project https://www.openaccess.nl/en/you-share-we-take-careOtherwise as indicated in the copyright section: the publisher is the copyright holder of this work and the author uses the Dutch legislation to make this work public.