A matrix-multiply unit for posits in reconfigurable logic leveraging (Open)CAPI

Jianyu  Chen; Zaid Al-Ars; H. Peter Hofstee

doi:10.1145/3190339.3190340

A matrix-multiply unit for posits in reconfigurable logic leveraging (Open)CAPI

Jianyu Chen, Zaid Al-Ars, H. Peter Hofstee^*

^*Corresponding author for this work

Computer Engineering

Research output: Chapter in Book/Conference proceedings/Edited volume › Conference contribution › Scientific › peer-review

8 Citations (Scopus)

68 Downloads (Pure)

Abstract

In this paper, we present the design in reconfigurable logic of a matrix multiplier for matrices of 32-bit posit numbers with es=2 [1]. Vector dot products are computed without intermediate rounding as suggested by the proposed posit standard to maximally retain precision. An initial implementation targets the CAPI 1.0 interface on the POWER8 processor and achieves about 10Gpops (Giga posit operations per second). Follow-on implementations targeting CAPI 2.0 and OpenCAPI 3.0 on POWER9 are expected to achieve up to 64Gpops. Our design is available under a permissive open source license at https://github.com/ChenJianyunp/Unum_matrix_multiplier. We hope the current work, which works on CAPI 1.0, along with future community contributions, will help enable a more extensive exploration of this proposed new format.

Original language	English
Title of host publication	Proceedings of the Conference for Next Generation Arithmetic, CoNGA 2018
Publisher	ACM
Pages	1-5
Number of pages	5
ISBN (Electronic)	978-1-4503-6414-0
DOIs	https://doi.org/10.1145/3190339.3190340
Publication status	Published - 2018
Event	CoNGA 2018: The Conference for Next Generation Arithmetic - Singapore, Singapore Duration: 28 Mar 2018 → 28 Mar 2018

Conference

Conference	CoNGA 2018
Country/Territory	Singapore
City	Singapore
Period	28/03/18 → 28/03/18

Keywords

Dot-product
Matrix-multiplier
Posit number
OA-Fund TU Delft

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10.1145/3190339.3190340

a1-chenFinal published version, 763 KBLicence: CC BY

Cite this

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title = "A matrix-multiply unit for posits in reconfigurable logic leveraging (Open)CAPI",

abstract = "In this paper, we present the design in reconfigurable logic of a matrix multiplier for matrices of 32-bit posit numbers with es=2 [1]. Vector dot products are computed without intermediate rounding as suggested by the proposed posit standard to maximally retain precision. An initial implementation targets the CAPI 1.0 interface on the POWER8 processor and achieves about 10Gpops (Giga posit operations per second). Follow-on implementations targeting CAPI 2.0 and OpenCAPI 3.0 on POWER9 are expected to achieve up to 64Gpops. Our design is available under a permissive open source license at https://github.com/ChenJianyunp/Unum_matrix_multiplier. We hope the current work, which works on CAPI 1.0, along with future community contributions, will help enable a more extensive exploration of this proposed new format.",

keywords = "Dot-product, Matrix-multiplier, Posit number, OA-Fund TU Delft",

author = "Jianyu Chen and Zaid Al-Ars and Hofstee, {H. Peter}",

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N2 - In this paper, we present the design in reconfigurable logic of a matrix multiplier for matrices of 32-bit posit numbers with es=2 [1]. Vector dot products are computed without intermediate rounding as suggested by the proposed posit standard to maximally retain precision. An initial implementation targets the CAPI 1.0 interface on the POWER8 processor and achieves about 10Gpops (Giga posit operations per second). Follow-on implementations targeting CAPI 2.0 and OpenCAPI 3.0 on POWER9 are expected to achieve up to 64Gpops. Our design is available under a permissive open source license at https://github.com/ChenJianyunp/Unum_matrix_multiplier. We hope the current work, which works on CAPI 1.0, along with future community contributions, will help enable a more extensive exploration of this proposed new format.

AB - In this paper, we present the design in reconfigurable logic of a matrix multiplier for matrices of 32-bit posit numbers with es=2 [1]. Vector dot products are computed without intermediate rounding as suggested by the proposed posit standard to maximally retain precision. An initial implementation targets the CAPI 1.0 interface on the POWER8 processor and achieves about 10Gpops (Giga posit operations per second). Follow-on implementations targeting CAPI 2.0 and OpenCAPI 3.0 on POWER9 are expected to achieve up to 64Gpops. Our design is available under a permissive open source license at https://github.com/ChenJianyunp/Unum_matrix_multiplier. We hope the current work, which works on CAPI 1.0, along with future community contributions, will help enable a more extensive exploration of this proposed new format.

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KW - Matrix-multiplier

KW - Posit number

KW - OA-Fund TU Delft

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BT - Proceedings of the Conference for Next Generation Arithmetic, CoNGA 2018

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ER -

A matrix-multiply unit for posits in reconfigurable logic leveraging (Open)CAPI

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Keywords

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