A Review on Gate Oxide Failure Mechanisms of Silicon Carbide Semiconductor Devices

Jinglin Li; Aditya Shekhar; Willem D. Van Driel; Guoqi Zhang

doi:10.1109/TED.2024.3482252

A Review on Gate Oxide Failure Mechanisms of Silicon Carbide Semiconductor Devices

Jinglin Li^*, Aditya Shekhar, Willem D. Van Driel, Guoqi Zhang

^*Corresponding author for this work

Research output: Contribution to journal › Article › Scientific › peer-review

Abstract

In this article, we provide a comprehensive review of defect formation at the atomic level in interfaces and gate oxides, focusing on two primary defect types: interface traps and oxide traps. We summarize the current theoretical models and experimental observations related to these intrinsic defects, as they critically impact device performance and reliability. By integrating theoretical insights with experimental data, this review provides a thorough understanding of the atomic-scale interactions that govern defect formation.

Original language	English
Pages (from-to)	7230-7243
Number of pages	14
Journal	IEEE Transactions on Electron Devices
Volume	71
Issue number	12
DOIs	https://doi.org/10.1109/TED.2024.3482252
Publication status	Published - 2024

Bibliographical note

Green Open Access added to TU Delft Institutional Repository ‘You share, we take care!’ – Taverne project https://www.openaccess.nl/en/you-share-we-take-care
Otherwise as indicated in the copyright section: the publisher is the copyright holder of this work and the author uses the Dutch legislation to make this work public.

Keywords

Acceleration model
failure mechanisms
silicon carbide (SiC) MOS devices
time-dependent dielectric breakdown (TDDB)

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10.1109/TED.2024.3482252

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@article{8e4e9a1b394048848dd5b7ac1aa3c553,

title = "A Review on Gate Oxide Failure Mechanisms of Silicon Carbide Semiconductor Devices",

abstract = "In this article, we provide a comprehensive review of defect formation at the atomic level in interfaces and gate oxides, focusing on two primary defect types: interface traps and oxide traps. We summarize the current theoretical models and experimental observations related to these intrinsic defects, as they critically impact device performance and reliability. By integrating theoretical insights with experimental data, this review provides a thorough understanding of the atomic-scale interactions that govern defect formation.",

keywords = "Acceleration model, failure mechanisms, silicon carbide (SiC) MOS devices, time-dependent dielectric breakdown (TDDB)",

author = "Jinglin Li and Aditya Shekhar and {Van Driel}, {Willem D.} and Guoqi Zhang",

note = "Green Open Access added to TU Delft Institutional Repository {\textquoteleft}You share, we take care!{\textquoteright} – Taverne project https://www.openaccess.nl/en/you-share-we-take-care Otherwise as indicated in the copyright section: the publisher is the copyright holder of this work and the author uses the Dutch legislation to make this work public. ",

year = "2024",

doi = "10.1109/TED.2024.3482252",

language = "English",

volume = "71",

pages = "7230--7243",

journal = "IEEE Transactions on Electron Devices",

issn = "0018-9383",

publisher = "IEEE",

number = "12",

}

TY - JOUR

T1 - A Review on Gate Oxide Failure Mechanisms of Silicon Carbide Semiconductor Devices

AU - Li, Jinglin

AU - Shekhar, Aditya

AU - Van Driel, Willem D.

AU - Zhang, Guoqi

N1 - Green Open Access added to TU Delft Institutional Repository ‘You share, we take care!’ – Taverne project https://www.openaccess.nl/en/you-share-we-take-care Otherwise as indicated in the copyright section: the publisher is the copyright holder of this work and the author uses the Dutch legislation to make this work public.

PY - 2024

Y1 - 2024

N2 - In this article, we provide a comprehensive review of defect formation at the atomic level in interfaces and gate oxides, focusing on two primary defect types: interface traps and oxide traps. We summarize the current theoretical models and experimental observations related to these intrinsic defects, as they critically impact device performance and reliability. By integrating theoretical insights with experimental data, this review provides a thorough understanding of the atomic-scale interactions that govern defect formation.

AB - In this article, we provide a comprehensive review of defect formation at the atomic level in interfaces and gate oxides, focusing on two primary defect types: interface traps and oxide traps. We summarize the current theoretical models and experimental observations related to these intrinsic defects, as they critically impact device performance and reliability. By integrating theoretical insights with experimental data, this review provides a thorough understanding of the atomic-scale interactions that govern defect formation.

KW - Acceleration model

KW - failure mechanisms

KW - silicon carbide (SiC) MOS devices

KW - time-dependent dielectric breakdown (TDDB)

UR - http://www.scopus.com/inward/record.url?scp=85207876140&partnerID=8YFLogxK

U2 - 10.1109/TED.2024.3482252

DO - 10.1109/TED.2024.3482252

M3 - Article

AN - SCOPUS:85207876140

SN - 0018-9383

VL - 71

SP - 7230

EP - 7243

JO - IEEE Transactions on Electron Devices

JF - IEEE Transactions on Electron Devices

IS - 12

ER -

A Review on Gate Oxide Failure Mechanisms of Silicon Carbide Semiconductor Devices

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Keywords

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