TY - JOUR
T1 - A Three-Phase Regulating Resonant-Current-Mode Rectifier With Bypass-Capacitor Residual-Free Charging for Wireless Power Transfer
AU - Lu, Tianqi
AU - Du, Sijun
PY - 2025
Y1 - 2025
N2 - This article analyzes the recently emerged resonant current-mode (RCM) topology and compares it with conventional voltage-mode (VM) rectifiers. Building upon prior RCM designs, a three-phase RCM rectifier is proposed to achieve a wider output power range and higher power efficiency, enabled by residual-free charge delivery through a bypass-capacitor-based mechanism. By incorporating a low-power freewheeling phase, the rectifier supports in situ output voltage regulation and inherently enables load-shift-keying (LSK)-based uplink data transfer, eliminating the need for additional voltage regulators or data links. A digitally assisted adaptive zero-voltage switching (ZVS) technique with fast delay compensation is implemented to minimize conduction losses in the power stage. Fabricated in a 180-nm CMOS process, the prototype occupies a silicon area of 0.4 mm2. Measurement results demonstrate reliable hysteresis output regulation at 3.3V, while the output voltage can span a wide range from 2.2 to 4.4 V. The output power ranges from 0.4 to 209.4 mW. A peak power conversion efficiency (PCE) of 94.5% is achieved at 90.8-mW output power. The PCE remains above 80% for all tested output voltages (2.2, 3.3, 4.4 V) when the load current exceeds 1mA.
AB - This article analyzes the recently emerged resonant current-mode (RCM) topology and compares it with conventional voltage-mode (VM) rectifiers. Building upon prior RCM designs, a three-phase RCM rectifier is proposed to achieve a wider output power range and higher power efficiency, enabled by residual-free charge delivery through a bypass-capacitor-based mechanism. By incorporating a low-power freewheeling phase, the rectifier supports in situ output voltage regulation and inherently enables load-shift-keying (LSK)-based uplink data transfer, eliminating the need for additional voltage regulators or data links. A digitally assisted adaptive zero-voltage switching (ZVS) technique with fast delay compensation is implemented to minimize conduction losses in the power stage. Fabricated in a 180-nm CMOS process, the prototype occupies a silicon area of 0.4 mm2. Measurement results demonstrate reliable hysteresis output regulation at 3.3V, while the output voltage can span a wide range from 2.2 to 4.4 V. The output power ranges from 0.4 to 209.4 mW. A peak power conversion efficiency (PCE) of 94.5% is achieved at 90.8-mW output power. The PCE remains above 80% for all tested output voltages (2.2, 3.3, 4.4 V) when the load current exceeds 1mA.
KW - Back telemetry
KW - biomedical implant
KW - load-shift-keying (LSK)
KW - residual-free charging
KW - resonant-current-mode (RCM)
KW - single-stage regulating rectifier
KW - uplink
KW - wireless power transfer (WPT)
KW - zero-voltage switching (ZVS)
UR - http://www.scopus.com/inward/record.url?scp=105013775315&partnerID=8YFLogxK
U2 - 10.1109/JSSC.2025.3597069
DO - 10.1109/JSSC.2025.3597069
M3 - Article
AN - SCOPUS:105013775315
SN - 0018-9200
JO - IEEE Journal of Solid-State Circuits
JF - IEEE Journal of Solid-State Circuits
ER -