A Wafer-Scale Process for the Monolithic Integration of CVD Graphene and CMOS Logic for Smart MEMS/NEMS Sensors

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Abstract

In this paper we present, for the first time, the successful monolithic wafer-scale integration of CVD graphene with CMOS logic for highly miniaturized smart sensing structures with on-chip readout electronics. The use of a patterned CMOS compatible catalyst for pre-defined regions of CVD graphene growth, and the transfer-free process used, allows the direct implementation of patterned graphene structures between the front-end-of-line (FEOL) and back-end-of-line (BEOL) processes. No significant deterioration of the graphene properties and of the CMOS logic gate performance due to the high temperature graphene growth step was observed. This is a significant leap towards industrial production of graphene-based smart MEMS/NEMS sensors.

Original languageEnglish
Title of host publication2019 IEEE 32nd International Conference on Micro Electro Mechanical Systems (MEMS)
Place of PublicationPiscataway
PublisherIEEE
Pages260-263
Number of pages4
ISBN (Electronic)978-1-7281-1610-5
ISBN (Print)978-1-7281-1611-2
DOIs
Publication statusPublished - 2019
Event32nd IEEE International Conference on Micro Electro Mechanical Systems, MEMS 2019 - Seoul, Korea, Republic of
Duration: 27 Jan 201931 Jan 2019

Conference

Conference32nd IEEE International Conference on Micro Electro Mechanical Systems, MEMS 2019
Country/TerritoryKorea, Republic of
CitySeoul
Period27/01/1931/01/19

Bibliographical note

Green Open Access added to TU Delft Institutional Repository ‘You share, we take care!’ – Taverne project https://www.openaccess.nl/en/you-share-we-take-care

Otherwise as indicated in the copyright section: the publisher is the copyright holder of this work and the author uses the Dutch legislation to make this work public.

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