A Wideband Four-Way Doherty Bits-In RF-Out CMOS Transmitter

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Abstract

We present a wideband, 12-bit four-way Doherty Cartesian digital transmitter (DTX) featuring an innovative 50%-LO signed I/Q interleaved up-conversion technique that enables close to perfect orthogonal I/Q summation. The DTX incorporates a compact four-way lumped-element Doherty power combining network to enhance its average efficiency at deep power back-off (DPBO). It comprises a signed second-order hold (SOH) interpolation filter to suppress the sampling spectral replicas significantly. The proposed DTX is realized in a 40-nm bulk CMOS and delivers a peak output power of 27.54 dBm with drain and system efficiencies of 46.35% and 30.77%, respectively, at 5.3 GHz. At 12 dB DPBO, the realized DTX demonstrates a drain efficiency (DE) of 41.74%-39.27% in a 5.2-5.5 GHz band, respectively. Its intrinsic I/Q image, LO leakage, and C-IMD3/H 3BB for a 200 MHz tone spacing over a 4.8-6.2 GHz band are-64,-65, and-69 dBc, respectively, without calibration. Applying a simple memoryless 2× 1-D digital pre-distortion, its error vector magnitude and adjacent channel leakage ratio are lower than-31 dB and-39 dBc, respectively, for a six-carrier '40 MHz 256-QAM OFDM' signal with 18 dBm average output power and a 41% average DE. The signed SOH functionality is verified employing a four-carrier '80 MHz 512-QAM OFDM' signal with spectral purity of better than-35 dBc, while its baseband sampling frequency is 675 MHz.

Original languageEnglish
Article number9526619
Pages (from-to)3768-3783
Number of pages16
JournalIEEE Journal of Solid-State Circuits
Volume56
Issue number12
DOIs
Publication statusPublished - 2021

Bibliographical note

Accepted author manuscript

Keywords

  • 50%-LO clock distribution
  • 8-shape inductor/balun
  • current-mode class-D (CMCD)
  • efficiency enhancement
  • in-phase/quadrature (Q) interleaving
  • radio frequency digital-to-analog converter (RF-DAC)
  • sign-bit

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