Adaptive ILP Control to increase Fault Tolerance for VLIW Processors

A. L. Sartor, S. Wong, A.C.S. Beck

Research output: Chapter in Book/Conference proceedings/Edited volumeConference contributionScientificpeer-review

13 Citations (Scopus)


Because of technology scaling, soft error rate has been increasing in modern processors, affecting system reliability. To mitigate such effect, we propose an adaptive fault tolerance approach that exploits, at run-time, idle functional units to execute duplicated instructions in a configurable VLIW processor. In applications with high Instruction Level Parallelism (ILP) and few functional units available for duplication, it adaptively reschedules instructions according to a configurable threshold, providing a tradeoff between performance and fault tolerance. On average, failure rate is reduced by 89.53%, performance by 5.86%; while energy consumption increases by 72% and area by 22.2%, using a fault tolerance oriented threshold.
Original languageEnglish
Title of host publicationApplication-specific Systems, Architectures and Processors (ASAP), 2016 IEEE 27th International Conference on
Place of PublicationLondon, UK
Number of pages8
Publication statusPublished - Jul 2016


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