ALMARVI Execution Platform: Heterogeneous Video Processing SoC Platform on FPGA

Joost Hoozemans; Jeroen van Straten; Timo Viitanen; Aleksi Tervo; Jiri Kadlec; Zaid Al-Ars

doi:10.1007/s11265-018-1424-1

ALMARVI Execution Platform: Heterogeneous Video Processing SoC Platform on FPGA

Joost Hoozemans, Jeroen van Straten, Timo Viitanen, Aleksi Tervo, Jiri Kadlec, Zaid Al-Ars^*

^*Corresponding author for this work

Computer Engineering

Research output: Contribution to journal › Article › Scientific › peer-review

7 Citations (Scopus)

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Abstract

The proliferation of processing hardware alternatives allows developers to use various customized computing platforms to run their applications in an optimal way. However, porting application code on custom hardware requires a lot of development and porting effort. This paper describes a heterogeneous computational platform (the ALMARVI execution platform) comprising of multiple communicating processors that allow easy programmability through an interface to OpenCL. The ALMARVI platform uses processing elements based on both VLIW and Transport Triggered Architectures (ρ-VEX and TCE cores, respectively). It can be implemented on Zynq devices such as the ZedBoard, and supports OpenCL by means of the pocl (Portable OpenCL) project and our ALMAIF interface specification. This allows developers to execute kernels transparently on either processing elements, thereby allowing to optimize execution time with minimal design and development effort.

Original language	English
Pages (from-to)	61-73
Number of pages	13
Journal	Journal of Signal Processing Systems
Volume	91
Issue number	1
DOIs	https://doi.org/10.1007/s11265-018-1424-1
Publication status	Published - 2019

Keywords

ALMARVI
OpenCL
pocl
rVEX
TCE
TTA
ZYNQ

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10.1007/s11265-018-1424-1

Hoozemans2019_Article_ALMARVIExecutionPlatformHeteroFinal published version, 2.48 MBLicence: CC BY

Cite this

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abstract = "The proliferation of processing hardware alternatives allows developers to use various customized computing platforms to run their applications in an optimal way. However, porting application code on custom hardware requires a lot of development and porting effort. This paper describes a heterogeneous computational platform (the ALMARVI execution platform) comprising of multiple communicating processors that allow easy programmability through an interface to OpenCL. The ALMARVI platform uses processing elements based on both VLIW and Transport Triggered Architectures (ρ-VEX and TCE cores, respectively). It can be implemented on Zynq devices such as the ZedBoard, and supports OpenCL by means of the pocl (Portable OpenCL) project and our ALMAIF interface specification. This allows developers to execute kernels transparently on either processing elements, thereby allowing to optimize execution time with minimal design and development effort.",

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year = "2019",

doi = "10.1007/s11265-018-1424-1",

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AU - Viitanen, Timo

AU - Tervo, Aleksi

AU - Kadlec, Jiri

AU - Al-Ars, Zaid

PY - 2019

Y1 - 2019

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ALMARVI Execution Platform: Heterogeneous Video Processing SoC Platform on FPGA

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Keywords

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