@inproceedings{3e471b6f7c2548cbb906292eab28e8ff,
title = "An Accelerator for Posit Arithmetic Targeting Posit Level 1 BLAS Routines and Pair-HMM",
abstract = "The newly proposed posit number format uses a significantly different approach to represent floating point numbers. This paper introduces a framework for posit arithmetic in reconfigurable logic that maintains full precision in intermediate results. We present the design and implementation of a L1 BLAS arithmetic accelerator on posit vectors leveraging Apache Arrow. For a vector dot product with an input vector length of 10^6 elements, a hardware speedup of approximately 10^4 is achieved as compared to posit software emulation. For 32-bit numbers, the decimal accuracy of the posit dot product results improve by one decimal of accuracy on average compared to a software implementation, and two extra decimals compared to the IEEE754 format. We also present a posit-based implementation of pair-HMM. In this case, the hardware speedup vs. a posit-based software implementation ranges from 10^5 to 10^6. With appropriate initial scaling constants, accuracy improves on an implementation based on IEEE 754.",
keywords = "Accelerator, Arithmetic, BLAS, Decimal accuracy, FPGA, Pair-HMM, Posit, Unum, Unum-III, OA-Fund TU Delft",
author = "{van Dam}, Laurens and Johan Peltenburg and Zaid Al-Ars and Hofstee, {H. Peter}",
year = "2019",
doi = "10.1145/3316279.3316284",
language = "English",
isbn = "978-1-4503-7139-1",
pages = "5:1----5:10",
booktitle = "CoNGA'19 Proceedings of the Conference for Next Generation Arithmetic 2019",
publisher = "Association for Computing Machinery (ACM)",
address = "United States",
note = "CoNGA 2019 : The Conference for Next Generation Arithmetic , CoNGA'19 ; Conference date: 13-03-2019 Through 14-03-2019",
}