An Alternative Solder Interconnect Reliability Test to Evaluate Drop Impact Performance

With the increased use of mobile phones, navigation systems, PDA's, laptops and portable gaming devices, the drop reliability of microelectronics has become an important parameter. Assessing the solder interconnect quality by means of drop impact testing, as standardized by e.g. JEDEC, during normal production requires considerable amounts of time and effort. Besides this, the repeatability of the drop impact test is low and introduces elaborate and time-consuming analysis of the results after testing. Already many researchers have investigated new test techniques capable of replacing the drop impact test, e.g. high-speed shear, pull and bending. Among those tests is the High Speed Cold Bump Pull test (HSCBP or CBP). In the CBP test the solder bump is pulled in vertical direction from the die using a smal pair of jaws. In this test, by varying the pull speed several different strain-rates can be applied to the solder bump. In our research a correlation between the drop impact test and cold bump pull test is investigated. This can be divided into three parts. First by investigating the cold bump pull test apparatus for uncontrolled parameters that might introduce a bias or spread in the results. Secondly by means of modeling the cold bump pull test to investigate solder bump deformation and solder bump loading during pull-off. Finally, the differences and simularities between the drop impact test and the cold bump pull test are briefly discussed and some observations concerning the solder joint performance are presented.