An efficient FPGA design of reverse converter for the moduli set {2n+2, 2n+1, 2n}

KA Gbolagade, GR Voicu, SD Cotofana

Research output: Chapter in Book/Conference proceedings/Edited volume › Conference contribution › Scientific

Original language	English
Title of host publication	Advanced computer architecture and compilation for high-performance and embedded systems
Editors	s.n.
Place of Publication	s.l.
Publisher	s.n.
Pages	117-120
Number of pages	4
ISBN (Print)	978 90 382-1631 7
Publication status	Published - 2010
Event	ACACES 2010 - s.l. Duration: 14 Jul 2010 → 14 Jul 2010

Name
Publisher	s.n.

Conference	ACACES 2010
Period	14/07/10 → 14/07/10

Keywords

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title = "An efficient FPGA design of reverse converter for the moduli set {2n+2, 2n+1, 2n}",

keywords = "conference contrib. refereed, Conf.proc. > 3 pag",

author = "KA Gbolagade and GR Voicu and SD Cotofana",

year = "2010",

language = "English",

isbn = "978 90 382-1631 7",

publisher = "s.n.",

pages = "117--120",

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booktitle = "Advanced computer architecture and compilation for high-performance and embedded systems",

note = "ACACES 2010 ; Conference date: 14-07-2010 Through 14-07-2010",

}

TY - GEN

T1 - An efficient FPGA design of reverse converter for the moduli set {2n+2, 2n+1, 2n}

AU - Gbolagade, KA

AU - Voicu, GR

AU - Cotofana, SD

PY - 2010

Y1 - 2010

KW - conference contrib. refereed

KW - Conf.proc. > 3 pag

M3 - Conference contribution

SN - 978 90 382-1631 7

SP - 117

EP - 120

BT - Advanced computer architecture and compilation for high-performance and embedded systems

A2 - s.n., null

PB - s.n.

CY - s.l.

T2 - ACACES 2010

Y2 - 14 July 2010 through 14 July 2010

ER -