Analysis and design of bias circuits tolerating output voltages above BV-CEO

H Veenstra, GAM Hurkx, D van Goor, H Brekelmans, JR Long

Research output: Contribution to journalArticleScientificpeer-review

29 Citations (Scopus)
Original languageUndefined/Unknown
Pages (from-to)2008-2018
Number of pages11
JournalIEEE Journal of Solid State Circuits
Volume40
Issue number10
Publication statusPublished - 2005

Keywords

  • academic journal papers
  • ZX CWTS 1.00 <= JFIS < 3.00

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