Approximate TMR based on successive approximation and loop perforation in microprocessors

G. S. Rodrigues*, J. S. Fonseca, F. L. Kastensmidt, V. Pouget, A. Bosio, S. Hamdioui

*Corresponding author for this work

Research output: Contribution to journalArticleScientificpeer-review

15 Citations (Scopus)


This work presents an approximate triple modular redundancy (ATMR) method based on successive approximation and loop perforation. Successive approximation consists of loop-based algorithms that improve their output quality on every iteration execution. By manipulating the number of executed iterations, a designer can balance output quality and execution time performance. The proposed technique exploits this approximate computing paradigm combined with data size and precision reduction to minimize traditional triple modular redundancy (TMR) costs while maintaining a good fault masking capability. A number of ATMR configurations are presented and tested under laser fault injection to evaluate their fault masking capability. The benchmarks are implemented as embedded software in the ARM Cortex A9 processor of a Xilinx Zynq-7000 series board. The proposed technique was able to improve the execution time overhead with the usage of approximations, with an acceptable fault masking rate.

Original languageEnglish
Article number113385
Number of pages7
JournalMicroelectronics Reliability
Publication statusPublished - 1 Sept 2019


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