Automated dataflow graph merging

Nils Voss, Stephen Girdlestone, Oskar Mencer, Georgi Gaydadjiev

Research output: Chapter in Book/Conference proceedings/Edited volumeConference contributionScientificpeer-review

6 Citations (Scopus)

Abstract

In this paper we present several algorithms used to construct a tool that automatically optimizes static dataflow graphs for the purpose of high level hardware synthesis. Our target is to automatically merge multiple dataflow graphs in order to create a single structure implementing all distinct operations with minimal area overhead by time-slicing hardware resources. We show that a combination of dedicated optimizations and a simple greedy approach for graph merging reduces the overall area by up to 4x compared to a naive hardware implementation.

Original languageEnglish
Title of host publicationProceedings - 2016 16th International Conference on Embedded Computer Systems
Subtitle of host publicationArchitectures, Modeling and Simulation, SAMOS 2016
PublisherInstitute of Electrical and Electronics Engineers (IEEE)
Pages219-226
Number of pages8
ISBN (Electronic)9781509030767
DOIs
Publication statusPublished - 13 Jan 2017
Externally publishedYes
Event16th International Conference on Embedded Computer Systems: Architectures, Modeling and Simulation, SAMOS 2016 - Samos, Greece
Duration: 17 Jul 201621 Jul 2016

Conference

Conference16th International Conference on Embedded Computer Systems: Architectures, Modeling and Simulation, SAMOS 2016
Country/TerritoryGreece
CitySamos
Period17/07/1621/07/16

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