Automated hybrid interconnect design for FPGA accelerators using data communication profiling

P Pham Quoc Cuong; Z Al-Ars; K Bertels

doi:10.1109/IPDPSW.2014.21

Automated hybrid interconnect design for FPGA accelerators using data communication profiling

P Pham Quoc Cuong, Z Al-Ars, K Bertels

Computer Engineering

Research output: Chapter in Book/Conference proceedings/Edited volume › Conference contribution › Scientific › peer-review

2 Citations (Scopus)

Original language	English
Title of host publication	Proceedings - IEEE 28th International Parallel and Distributed Processing Symposium Workshops
Editors	M Parashar
Place of Publication	Los Alamitos, CA, USA
Publisher	IEEE
Pages	151-160
Number of pages	10
ISBN (Print)	978-1-4799-4117-9
DOIs	https://doi.org/10.1109/IPDPSW.2014.21
Publication status	Published - 2014
Event	IPDPSW 2014, Phoenix, AZ, USA - Los Alamitos, CA, USA Duration: 19 May 2014 → 23 May 2014

Publication series

Name
Publisher	IEEE Computer Society

Conference

Conference	IPDPSW 2014, Phoenix, AZ, USA
Period	19/05/14 → 23/05/14

Access to Document

10.1109/IPDPSW.2014.21

Cite this

@inproceedings{13480e0be9ad4717b3e23fc1a14ab06a,

title = "Automated hybrid interconnect design for FPGA accelerators using data communication profiling",

author = "{Pham Quoc Cuong}, P and Z Al-Ars and K Bertels",

year = "2014",

doi = "10.1109/IPDPSW.2014.21",

language = "English",

isbn = "978-1-4799-4117-9",

publisher = "IEEE",

pages = "151--160",

editor = "M Parashar",

booktitle = "Proceedings - IEEE 28th International Parallel and Distributed Processing Symposium Workshops",

address = "United States",

note = "IPDPSW 2014, Phoenix, AZ, USA ; Conference date: 19-05-2014 Through 23-05-2014",

}

Pham Quoc Cuong, P, Al-Ars, Z & Bertels, K 2014, Automated hybrid interconnect design for FPGA accelerators using data communication profiling. in M Parashar (ed.), Proceedings - IEEE 28th International Parallel and Distributed Processing Symposium Workshops. IEEE, Los Alamitos, CA, USA, pp. 151-160, IPDPSW 2014, Phoenix, AZ, USA, 19/05/14. https://doi.org/10.1109/IPDPSW.2014.21

Automated hybrid interconnect design for FPGA accelerators using data communication profiling. / Pham Quoc Cuong, P; Al-Ars, Z; Bertels, K.
Proceedings - IEEE 28th International Parallel and Distributed Processing Symposium Workshops. ed. / M Parashar. Los Alamitos, CA, USA: IEEE, 2014. p. 151-160.

Research output: Chapter in Book/Conference proceedings/Edited volume › Conference contribution › Scientific › peer-review

TY - GEN

T1 - Automated hybrid interconnect design for FPGA accelerators using data communication profiling

AU - Pham Quoc Cuong, P

AU - Al-Ars, Z

AU - Bertels, K

PY - 2014

Y1 - 2014

U2 - 10.1109/IPDPSW.2014.21

DO - 10.1109/IPDPSW.2014.21

M3 - Conference contribution

SN - 978-1-4799-4117-9

SP - 151

EP - 160

BT - Proceedings - IEEE 28th International Parallel and Distributed Processing Symposium Workshops

A2 - Parashar, M

PB - IEEE

CY - Los Alamitos, CA, USA

T2 - IPDPSW 2014, Phoenix, AZ, USA

Y2 - 19 May 2014 through 23 May 2014

ER -