Bipolar transistor epilayer design using the MAIDS mixed-level simulator

LCN de Vreede, HC de Graaff, JL Tauritz, JA Willemen, WD van Noort, HFF Jos, LE Larson, JW Slotboom

Research output: Contribution to journalArticleScientificpeer-review

Original languageUndefined/Unknown
Pages (from-to)1331-1338
Number of pages8
JournalIEEE Journal of Solid State Circuits
Issue number34
Publication statusPublished - 2000


  • ZX Int.klas.verslagjaar < 2002

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