Can Portability Improve Performance? An Empirical Study of Parallel Graph Analytics

Ana Lucia Varbanescu, Merijn Verstraaten, Cees de Laat, Ate Penders, Alexandru Iosup, Henk Sips

Research output: Chapter in Book/Conference proceedings/Edited volumeConference contributionScientificpeer-review

6 Citations (Scopus)


Due to increasingly large datasets, graph analytics - traversals, all-pairs shortest path computations, centrality measures, etc. - are becoming the focus of high-performance computing (HPC). Because HPC is currently dominated by many-core architectures (both CPUs and GPUs), new graph processing solutions have to be defined to efficiently use such computing resources. Prior work focuses on platform-specific performance studies and on platform-specific algorithm development, successfully proving that algorithms highly tuned to GPUs or multi-core CPUs can provide high performance graph analytics. However, the portability of such algorithms remains an important concern for many users, especially the many companies without the resources to invest in HPC or concerned about lock-in in single-use parallel techniques.
In this work, we investigate the functional portability and performance of graph analytics algorithms. We conduct an empirical study measuring the performance of 3 graph analytics algorithms (a single code implemented in OpenCL and targeted at many-core CPUs and GPUs), on 3 different platforms, using 11 real-world and synthetic datasets. Our results show that the code is functionally portable, that is, applications can run unchanged on both CPUs and GPUs. The large variation in their observed performance indicates that portability is necessary not only for productivity, but, surprisingly, also for performance. We conjecture that the impact of datasets on performance is too high to allow platform-specific algorithms to outperform the portable algorithms by large margins, in all cases. Our conclusion is that portable parallel graph analytics is feasible without significant performance loss, and provides a productive alternative to the expensive trial-and-error selection of one algorithm for each (graph,platform) pair.
Original languageEnglish
Title of host publicationProceedings of the 6th ACM/SPEC International Conference on Performance Engineering, ICPE'15
Place of PublicationNew York, NY
PublisherAssociation for Computing Machinery (ACM)
Number of pages11
ISBN (Print)978-1-4503-3248-4
Publication statusPublished - 2015
Event6th ACM/SPEC International Conference on Performance Engineering, ICPE 2015 - Austin, TX, United States
Duration: 31 Jan 20154 Feb 2015

Publication series



Conference6th ACM/SPEC International Conference on Performance Engineering, ICPE 2015
Abbreviated titleICPE 2015
CountryUnited States
CityAustin, TX

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