Challenges and Solutions in Emerging Memory Testing

E.I. Vatajelu; Paolo Prinetto; Mottaqiallah Taouil; Said Hamdioui

doi:10.1109/TETC.2017.2691263

Challenges and Solutions in Emerging Memory Testing

E.I. Vatajelu, Paolo Prinetto, Mottaqiallah Taouil, Said Hamdioui

Computer Engineering

Research output: Contribution to journal › Article › Scientific › peer-review

26 Citations (Scopus)

148 Downloads (Pure)

Abstract

The research and prototyping of new memory technologies are getting a lot of attention in order to enable new (computer) architectures and provide new opportunities for today’s and future applications. Delivering high quality and reliability products was and will remain a crucial step in the introduction of new technologies. Therefore, appropriate fault modelling, test development and design for testability (DfT) is needed. This paper overviews and discusses the challenges and the emerging solutions in testing three classes of memories: 3D stacked memories, Resistive memories and Spin-Transfer-Torque Magnetic memories. Defects mechanisms, fault models, and emerging test solutions will be discussed.

Original language	English
Article number	7894207
Pages (from-to)	493-506
Number of pages	14
Journal	IEEE Transactions on Emerging Topics in Computing
Volume	7
Issue number	3
DOIs	https://doi.org/10.1109/TETC.2017.2691263
Publication status	Published - 2019

Bibliographical note

Accepted author manuscript

Keywords

Emerging Memories
3D-SIC
Resistive RAM
Magnetic RAM
Defects
Fault Models
Test

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10.1109/TETC.2017.2691263

37688578 - 07894207Accepted author manuscript, 998 KB

Cite this

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AU - Hamdioui, Said

N1 - Accepted author manuscript

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Challenges and Solutions in Emerging Memory Testing

Abstract

Bibliographical note

Keywords

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