Characterization of a RISC-V Microcontroller Through Fault Injection

Dario Asciolla, Luigi Dilillo, Douglas Santos, Douglas Melo, Alessandra Menicucci, Marco Ottavi*

*Corresponding author for this work

Research output: Chapter in Book/Conference proceedings/Edited volumeConference contributionScientificpeer-review

4 Citations (Scopus)

Abstract

This article reports the results of fault injection on a microcontroller based on the RISC-V (Riscy) architecture. The fault injection approach uses fault simulation based on Modelsim and targets a set of 1000 fault injected per microcontroller block and per benchmarck. The chosen benchmarks are the Dhrystone and CoreMark that may represent generic workloads. The results show certain block are more prone to fault than others, as also confirmed by a vulnerability analysis that correlates the number of observed faults and the rate of access to the blocks.

Original languageEnglish
Title of host publicationApplications in Electronics Pervading Industry, Environment and Society - APPLEPIES 2019
EditorsSergio Saponara, Alessandro De Gloria
PublisherSpringerOpen
Pages91-101
Number of pages11
ISBN (Print)9783030372767
DOIs
Publication statusPublished - 2020
EventInternational Conference on Applications in Electronics Pervading Industry, Environment and Society, ApplePies 2019 - Pisa, Italy
Duration: 11 Sept 201913 Sept 2019

Publication series

NameLecture Notes in Electrical Engineering
Volume627
ISSN (Print)1876-1100
ISSN (Electronic)1876-1119

Conference

ConferenceInternational Conference on Applications in Electronics Pervading Industry, Environment and Society, ApplePies 2019
Country/TerritoryItaly
CityPisa
Period11/09/1913/09/19

Keywords

  • Fault injection
  • Micronontroller
  • RISC-V
  • Simulation

Fingerprint

Dive into the research topics of 'Characterization of a RISC-V Microcontroller Through Fault Injection'. Together they form a unique fingerprint.

Cite this