Characterization of top-gated Si/SiGe devices for spin qubit applications

Fabio Ansaloni; Christian Volk; Anasua Chatterjee; Ferdinand Kuemmeth

doi:10.23919/SNW.2019.8782944

Characterization of top-gated Si/SiGe devices for spin qubit applications

Fabio Ansaloni, Christian Volk, Anasua Chatterjee, Ferdinand Kuemmeth

Research output: Chapter in Book/Conference proceedings/Edited volume › Conference contribution › Scientific › peer-review

Abstract

Spins in gate-defined silicon quantum dots are at the forefront of solid-state qubit research. We characterize top-gated devices fabricated from Si/SiGe heterostructures, demonstrating the formation of stable double and triple quantum dots with proximal charge-sensing dots. We also demonstrate fabrication of linear dot arrays with overlapping gate technology, thereby significantly increasing the density of control electrodes relative to our single-gate-layer devices.

Original language	English
Title of host publication	2019 Silicon Nanoelectronics Workshop, SNW 2019
Editors	Takahiro Shinada , Toshifumi Irisawa , Katsuhiro Tomioka
Publisher	Institute of Electrical and Electronics Engineers (IEEE)
ISBN (Electronic)	978-4-8634-8702-4
ISBN (Print)	978-4-8634-8702-4
DOIs	https://doi.org/10.23919/SNW.2019.8782944
Publication status	Published - 2019
Event	24th Silicon Nanoelectronics Workshop, SNW 2019 - Kyoto, Japan Duration: 9 Jun 2019 → 10 Jun 2019

Conference

Conference	24th Silicon Nanoelectronics Workshop, SNW 2019
Country	Japan
City	Kyoto
Period	9/06/19 → 10/06/19

Access to Document

10.23919/SNW.2019.8782944

Link to publication in Scopus

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@inproceedings{8f5a465f1dbf4634bd46af1ee5d12f2f,

title = "Characterization of top-gated Si/SiGe devices for spin qubit applications",

abstract = "Spins in gate-defined silicon quantum dots are at the forefront of solid-state qubit research. We characterize top-gated devices fabricated from Si/SiGe heterostructures, demonstrating the formation of stable double and triple quantum dots with proximal charge-sensing dots. We also demonstrate fabrication of linear dot arrays with overlapping gate technology, thereby significantly increasing the density of control electrodes relative to our single-gate-layer devices.",

author = "Fabio Ansaloni and Christian Volk and Anasua Chatterjee and Ferdinand Kuemmeth",

year = "2019",

doi = "10.23919/SNW.2019.8782944",

language = "English",

isbn = "978-4-8634-8702-4",

editor = "{Shinada }, {Takahiro } and {Irisawa }, {Toshifumi } and {Tomioka }, {Katsuhiro }",

booktitle = "2019 Silicon Nanoelectronics Workshop, SNW 2019",

publisher = "Institute of Electrical and Electronics Engineers (IEEE)",

address = "United States",

note = "24th Silicon Nanoelectronics Workshop, SNW 2019 ; Conference date: 09-06-2019 Through 10-06-2019",

}

Ansaloni, F, Volk, C, Chatterjee, A & Kuemmeth, F 2019, Characterization of top-gated Si/SiGe devices for spin qubit applications. in T Shinada , T Irisawa & K Tomioka (eds), 2019 Silicon Nanoelectronics Workshop, SNW 2019., 8782944, Institute of Electrical and Electronics Engineers (IEEE), 24th Silicon Nanoelectronics Workshop, SNW 2019, Kyoto, Japan, 9/06/19. https://doi.org/10.23919/SNW.2019.8782944

Characterization of top-gated Si/SiGe devices for spin qubit applications. / Ansaloni, Fabio; Volk, Christian; Chatterjee, Anasua; Kuemmeth, Ferdinand.

2019 Silicon Nanoelectronics Workshop, SNW 2019. ed. / Takahiro Shinada ; Toshifumi Irisawa ; Katsuhiro Tomioka . Institute of Electrical and Electronics Engineers (IEEE), 2019. 8782944.

Research output: Chapter in Book/Conference proceedings/Edited volume › Conference contribution › Scientific › peer-review

TY - GEN

T1 - Characterization of top-gated Si/SiGe devices for spin qubit applications

AU - Ansaloni, Fabio

AU - Volk, Christian

AU - Chatterjee, Anasua

AU - Kuemmeth, Ferdinand

PY - 2019

Y1 - 2019

N2 - Spins in gate-defined silicon quantum dots are at the forefront of solid-state qubit research. We characterize top-gated devices fabricated from Si/SiGe heterostructures, demonstrating the formation of stable double and triple quantum dots with proximal charge-sensing dots. We also demonstrate fabrication of linear dot arrays with overlapping gate technology, thereby significantly increasing the density of control electrodes relative to our single-gate-layer devices.

AB - Spins in gate-defined silicon quantum dots are at the forefront of solid-state qubit research. We characterize top-gated devices fabricated from Si/SiGe heterostructures, demonstrating the formation of stable double and triple quantum dots with proximal charge-sensing dots. We also demonstrate fabrication of linear dot arrays with overlapping gate technology, thereby significantly increasing the density of control electrodes relative to our single-gate-layer devices.

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DO - 10.23919/SNW.2019.8782944

M3 - Conference contribution

SN - 978-4-8634-8702-4

BT - 2019 Silicon Nanoelectronics Workshop, SNW 2019

A2 - Shinada , Takahiro

A2 - Irisawa , Toshifumi

A2 - Tomioka , Katsuhiro

PB - Institute of Electrical and Electronics Engineers (IEEE)

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